Abstract: A buffer circuit includes a first transistor (T1) having a base connected to a first power supply, the emitter (E1) and collector (C1) connected as input and output nodes, a second transistor (T2) having a base connected to the first power supply, a first constant current circuit using a difference between outgoing current from E1 and an input current at the current signal input node as a constant current, and determining outgoing current from the emitter of T2 equal to the constant current; and a first mirror circuit equalizing first and second collector currents with a third transistor (T3) with C1 and a fourth transistor (T4) with a collector connected to a collector of T2, a first operating point voltage is provided to the current signal output node between T3 and T1, and a second operating point voltage based on the first operating point voltage between T4 and T2.

Abstract: A buffer circuit includes a first transistor having a base connected to a first power supply, an emitter as a current signal input node, and a collector as a current signal output node, a second transistor having a base connected to the first power supply, a first constant current circuit using a difference between outgoing current from the emitter of the first transistor and an input current at the current signal input node as a constant current, and determining outgoing current from the emitter of the second transistor as a current same as the constant current; and a first mirror circuit that makes a collector current of the first transistor equal to a collector current of the second transistor in which the first mirror circuit has a third transistor with a collector connected to the collector of the first transistor and a fourth transistor with a collector connected to a collector of the second transistor, a first operating point voltage is provided to the current signal output node between the third trans