Patents by Inventor Hidenori Arita

Hidenori Arita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of manufacturing the same
    Patent number: 6403422
    Abstract: The semiconductor device is provided with an element isolating region disposed in a matrix to define a channel region on a semiconductor substrate, gate interconnection layers extending in a direction and disposed at predetermined intervals from each other above element isolating region, and aluminum interconnection layers extending in a direction intersecting gate interconnection layers and disposed at predetermined intervals from each other, aluminum interconnection layer being disposed above element isolating region. Thus, it becomes possible to provide a semiconductor device and a method of manufacturing thereof which enable the reduction in time required for the final manufacturing steps of the semiconductor device after the ROM specifications are determined.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: June 11, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hidenori Arita, Kazuaki Miyata
  • METHOD OF MANUFACTURING A ROM DEVICE THAT INCLUDES ION IMPLANTATION THROUGH AN INSULATING LAYER
    Publication number: 20010050405
    Abstract: The semiconductor device is provided with an element isolating region disposed in a matrix to define a channel region on a semiconductor substrate, gate interconnection layers extending in a direction and disposed at predetermined intervals from each other above element isolating region, and aluminum interconnection layers extending in a direction intersecting gate interconnection layers and disposed at predetermined intervals from each other, aluminum interconnection layer being disposed above element isolating region. Thus, it becomes possible to provide a semiconductor device and a method of manufacturing thereof which enable the reduction in time required for the final manufacturing steps of the semiconductor device after the ROM specifications are determined.
    Type: Application
    Filed: November 23, 1998
    Publication date: December 13, 2001
    Inventors: HIDENORI ARITA, KAZUAKI MIYATA