Patents by Inventor Hidenori Mikami

Hidenori Mikami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11094537
    Abstract: Provided are a group III nitride composite substrate having a low sheet resistance and produced with a high yield, and a method for manufacturing the same, as well as a method for manufacturing a group III nitride semiconductor device using the group III nitride composite substrate. A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from the group III nitride film. The group III nitride film is joined to the support substrate in one of a direct manner and an indirect manner. The group III nitride film has a thickness of 10 ?m or more. A sheet resistance of a group III-nitride-film-side main surface is 200 ?/sq or less.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: August 17, 2021
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Akihiro Hachigo, Yuki Hiromura, Naoki Matsumoto, Seiji Nakahata, Fumitake Nakanishi, Takuya Yanagisawa, Koji Uematsu, Yuki Seki, Yoshiyuki Yamamoto, Yusuke Yoshizumi, Hidenori Mikami
  • Publication number: 20200176305
    Abstract: Provided are a group III nitride composite substrate having a low sheet resistance and produced with a high yield, and a method for manufacturing the same, as well as a method for manufacturing a group III nitride semiconductor device using the group III nitride composite substrate. A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from the group III nitride film. The group III nitride film is joined to the support substrate in one of a direct manner and an indirect manner. The group III nitride film has a thickness of 10 ?m or more. A sheet resistance of a group III-nitride-film-side main surface is 200 ?/sq or less.
    Type: Application
    Filed: February 11, 2020
    Publication date: June 4, 2020
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji ISHIBASHI, Akihiro HACHIGO, Yuki HIROMURA, Naoki MATSUMOTO, Seiji NAKAHATA, Fumitake NAKANISHI, Takuya YANAGISAWA, Koji UEMATSU, Yuki SEKI, Yoshiyuki YAMAMOTO, Yusuke YOSHIZUMI, Hidenori MIKAMI
  • Patent number: 10600676
    Abstract: Provided are a group III nitride composite substrate having a low sheet resistance and produced with a high yield, and a method for manufacturing the same, as well as a method for manufacturing a group III nitride semiconductor device using the group III nitride composite substrate. A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from the group III nitride film. The group III nitride film is joined to the support substrate in one of a direct manner and an indirect manner. The group III nitride film has a thickness of 10 ?m or more. A sheet resistance of a group III-nitride-film-side main surface is 200 ?/sq or less.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: March 24, 2020
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Ishibashi, Akihiro Hachigo, Yuki Hiromura, Naoki Matsumoto, Seiji Nakahata, Fumitake Nakanishi, Takuya Yanagisawa, Koji Uematsu, Yuki Seki, Yoshiyuki Yamamoto, Yusuke Yoshizumi, Hidenori Mikami
  • Publication number: 20180166325
    Abstract: Provided are a group III nitride composite substrate having a low sheet resistance and produced with a high yield, and a method for manufacturing the same, as well as a method for manufacturing a group III nitride semiconductor device using the group III nitride composite substrate. A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from the group III nitride film. The group III nitride film is joined to the support substrate in one of a direct manner and an indirect manner. The group III nitride film has a thickness of 10 ?m or more. A sheet resistance of a group III-nitride-film-side main surface is 200 ?/sq or less.
    Type: Application
    Filed: January 24, 2018
    Publication date: June 14, 2018
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji ISHIBASHI, Akihiro HACHIGO, Yuki HIROMURA, Naoki MATSUMOTO, Seiji NAKAHATA, Fumitake NAKANISHI, Takuya YANAGISAWA, Koji UEMATSU, Yuki SEKI, Yoshiyuki YAMAMOTO, Yusuke YOSHIZUMI, Hidenori MIKAMI
  • Patent number: 9917004
    Abstract: Provided are a group III nitride composite substrate having a low sheet resistance and produced with a high yield, and a method for manufacturing the same, as well as a method for manufacturing a group III nitride semiconductor device using the group III nitride composite substrate. A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from the group III nitride film. The group III nitride film is joined to the support substrate in one of a direct manner and an indirect manner. The group III nitride film has a thickness of 10 ?m or more. A sheet resistance of a group III-nitride-film-side main surface is 200 ?/sq or less.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: March 13, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Ishibashi, Akihiro Hachigo, Yuki Hiromura, Naoki Matsumoto, Seiji Nakahata, Fumitake Nakanishi, Takuya Yanagisawa, Koji Uematsu, Yuki Seki, Yoshiyuki Yamamoto, Yusuke Yoshizumi, Hidenori Mikami
  • Patent number: 9136337
    Abstract: A group III nitride composite substrate includes a support substrate and a group III nitride film. A ratio st/mt of a standard deviation st of the thickness of the group III nitride film, to a mean value mt of the thickness thereof is 0.001 or more and 0.2 or less, and a ratio so/mo of a standard deviation so of an absolute value of an off angle between a main surface of the group III nitride film and a plane of a predetermined plane orientation, to a mean value mo of the absolute value of the off angle thereof is 0.005 or more and 0.6 or less. Accordingly, there is provided a low-cost and large-diameter group III nitride composite substrate including a group III nitride film having a large thickness, a small thickness variation, and a high crystal quality.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: September 15, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Ishibashi, Akihiro Hachigo, Yuki Hiromura, Naoki Matsumoto, Seiji Nakahata, Fumitake Nakanishi, Yusuke Yoshizumi, Hidenori Mikami
  • Publication number: 20150194442
    Abstract: Provided are a group III nitride composite substrate having a low sheet resistance and produced with a high yield, and a method for manufacturing the same, as well as a method for manufacturing a group III nitride semiconductor device using the group III nitride composite substrate. A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from the group III nitride film. The group III nitride film is joined to the support substrate in one of a direct manner and an indirect manner. The group III nitride film has a thickness of 10 ?m or more. A sheet resistance of a group III-nitride-film-side main surface is 200 ?/sq or less.
    Type: Application
    Filed: September 4, 2013
    Publication date: July 9, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD
    Inventors: Keiji Ishibashi, Akihiro Hachigo, Yuki Hiromura, Naoki Matsumoto, Seiji Nakahata, Fumitake Nakanishi, Takuya Yanagisawa, Koji Uematsu, Yuki Seki, Yoshiyuki Yamamoto, Yusuke Yoshizumi, Hidenori Mikami
  • Publication number: 20140103353
    Abstract: A group III nitride composite substrate includes a support substrate and a group III nitride film. A ratio st/mt of a standard deviation st of the thickness of the group III nitride film, to a mean value mt of the thickness thereof is 0.001 or more and 0.2 or less, and a ratio so/mo of a standard deviation so of an absolute value of an off angle between a main surface of the group III nitride film and a plane of a predetermined plane orientation, to a mean value mo of the absolute value of the off angle thereof is 0.005 or more and 0.6 or less. Accordingly, there is provided a low-cost and large-diameter group III nitride composite substrate including a group III nitride film having a large thickness, a small thickness variation, and a high crystal quality.
    Type: Application
    Filed: September 18, 2013
    Publication date: April 17, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji ISHIBASHI, Akihiro HACHIGO, Yuki HIROMURA, Naoki MATSUMOTO, Seiji NAKAHATA, Fumitake NAKANISHI, Yusuke YOSHIZUMI, Hidenori MIKAMI
  • Publication number: 20130252401
    Abstract: A nitride semiconductor substrate having a main surface serving as a semipolar plane and provided with a chamfered portion capable of effectively preventing cracking and chipping, a semiconductor device fabricated using the nitride semiconductor substrate, and a method for manufacturing the nitride semiconductor substrate and the semiconductor device are provided. The nitride semiconductor substrate includes a main surface inclined at an angle of 71° or more and 79° or less with respect to the (0001) plane toward the [1-100] direction or inclined at an angle of 71° or more and 79° or less with respect to the (000-1) plane toward the [?1100] direction; and a chamfered portion located at an edge of an outer periphery of the main surface. The chamfered portion is inclined at an angle ?1 or ?2 of 5° or more and 45° or less with respect to adjacent one of the main surface and a backside surface on a side opposite to the main surface.
    Type: Application
    Filed: May 16, 2013
    Publication date: September 26, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Sayuri YAMAGUCHI, Naoki MATSUMOTO, Hidenori MIKAMI
  • Patent number: 8471365
    Abstract: A nitride semiconductor substrate having a main surface serving as a semipolar plane and provided with a chamfered portion capable of effectively preventing cracking and chipping, a semiconductor device fabricated using the nitride semiconductor substrate, and a method for manufacturing the nitride semiconductor substrate and the semiconductor device are provided. The nitride semiconductor substrate includes a main surface inclined at an angle of 71° or more and 79° or less with respect to the (0001) plane toward the [1-100] direction or inclined at an angle of 71° or more and 79° or less with respect to the (000-1) plane toward the [?1100] direction; and a chamfered portion located at an edge of an outer periphery of the main surface. The chamfered portion is inclined at an angle ?1 or ?2 of 5° or more and 45° or less with respect to adjacent one of the main surface and a backside surface on a side opposite to the main surface.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: June 25, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Sayuri Yamaguchi, Naoki Matsumoto, Hidenori Mikami
  • Patent number: 8471366
    Abstract: A nitride semiconductor device includes a main surface and an indicator portion. The main surface is a plane inclined by at least 71° and at most 79° in a [1-100] direction from a (0001) plane or a plane inclined by at least 71° and at most 79° in a [?1100] direction from a (000-1) plane. The indicator portion indicates a (?1017) plane, a (10-1-7) plane, or a plane inclined by at least ?4° and at most 4° in the [1-100] direction from these planes and inclined by at least ?0.5° and at most 0.5° in a direction orthogonal to the [1-100] direction.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: June 25, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hidenori Mikami, Naoki Matsumoto, Hideki Osada, Yusuke Yoshizumi, Sayuri Yamaguchi
  • Publication number: 20130134434
    Abstract: A nitride semiconductor device includes a main surface and an indicator portion. The main surface is a plane inclined by at least 71° and at most 79° in a [1-100] direction from a (0001) plane or a plane inclined by at least 71° and at most 79° in a [?1100] direction from a (000-1) plane. The indicator portion indicates a (?1017) plane, a (10-1-7) plane, or a plane inclined by at least ?4° and at most 4° in the [1-100] direction from these planes and inclined by at least ?0.5° and at most 0.5° in a direction orthogonal to the [1-100] direction.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hidenori Mikami, Naoki Matsumoto, Hideki Osada, Yusuke Yoshizumi, Sayuri Yamaguchi
  • Publication number: 20130061841
    Abstract: A method of manufacturing a group III nitride crystal substrate slices a group III nitride crystal body with a saw wire which includes a steel wire having a carbon concentration of 0.90-0.95 mass %, a silicon concentration of 0.12-0.32 mass %, a manganese concentration of 0.40-0.90 mass %, a phosphorus concentration of 0.025 mass % or less, a sulfur concentration of 0.025 mass % or less, and a copper concentration of 0.20 mass % or less, and has a diameter of not less than 0.07 mm and less than 0.16 mm, a tensile strength at break of higher than 4200 N/mm2, and a curl size of 400 mm or more, with a tension of not less than 50% and not more than 65% of the tension at break applied to the saw wire. Thus, group III nitride crystal substrates with small warpage can be manufactured.
    Type: Application
    Filed: August 21, 2012
    Publication date: March 14, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki MATSUMOTO, Hidenori Mikami
  • Publication number: 20130032013
    Abstract: A method of manufacturing a group III nitride crystal substrate includes the step of preparing a group III nitride crystal body and the step of producing a group III nitride crystal substrate by slicing the group III nitride crystal body with a resin-fixed-abrasive wire. Accordingly, the method of manufacturing a group III nitride crystal substrate is provided that enables large-sized group III nitride crystal substrates with a small warp and a small arithmetic mean surface roughness to be manufactured by means of a resin-fixed-abrasive wire efficiently with a high yield.
    Type: Application
    Filed: June 28, 2012
    Publication date: February 7, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hidenori MIKAMI, Naoki Matsumoto
  • Publication number: 20120184108
    Abstract: A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 ?m-10 ?m thick edge process-induced degradation layer.
    Type: Application
    Filed: April 2, 2012
    Publication date: July 19, 2012
    Inventors: Keiji Ishibashi, Hidenori Mikami, Naoki Matsumoto
  • Patent number: 8183669
    Abstract: A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 ?m-10 ?m thick edge process-induced degradation layer.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: May 22, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Hidenori Mikami, Naoki Matsumoto
  • Publication number: 20120043645
    Abstract: A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 ?m-10 ?m thick edge process-induced degradation layer.
    Type: Application
    Filed: November 2, 2011
    Publication date: February 23, 2012
    Inventors: Keiji ISHIBASHI, Hidenori Mikami, Naoki Matsumoto
  • Patent number: 8101523
    Abstract: A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 ?m-10 ?m thick edge process-induced degradation layer.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: January 24, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Hidenori Mikami, Naoki Matsumoto
  • Publication number: 20110068434
    Abstract: A nitride semiconductor substrate having a main surface serving as a semipolar plane and provided with a chamfered portion capable of effectively preventing cracking and chipping, a semiconductor device fabricated using the nitride semiconductor substrate, and a method for manufacturing the nitride semiconductor substrate and the semiconductor device are provided. The nitride semiconductor substrate includes a main surface inclined at an angle of 71° or more and 79° or less with respect to the (0001) plane toward the [1-100] direction or inclined at an angle of 71° or more and 79° or less with respect to the (000-1) plane toward the [?1100] direction; and a chamfered portion located at an edge of an outer periphery of the main surface. The chamfered portion is inclined at an angle ?1 or ?2 of 5° or more and 45° or less with respect to adjacent one of the main surface and a backside surface on a side opposite to the main surface.
    Type: Application
    Filed: July 9, 2010
    Publication date: March 24, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Sayuri Yamaguchi, Naoki Matsumoto, Hidenori Mikami
  • Publication number: 20110049679
    Abstract: A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 ?m-10 ?m thick edge process-induced degradation layer.
    Type: Application
    Filed: November 5, 2010
    Publication date: March 3, 2011
    Inventors: Keiji ISHIBASHI, Hidenori Mikami, Naoki Matsumoto