Patents by Inventor Hidenori Mochizuki

Hidenori Mochizuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10741648
    Abstract: A manufacturing yield and reliability of a semiconductor device including a power semiconductor element is improved. A plurality of trenches DT extending in an x direction and spaced apart from each other in a y direction orthogonal to the x direction are formed in a substrate having a main crystal surface tilted with respect to a <11-20> direction. Also, a super-junction structure is constituted of a p-type column region PC made of a semiconductor layer embedded in the trench DT and an n-type column region NC made of a part of the substrate between the trenches DT adjacent in the y direction, and an angle error between the extending direction of the trench DT (x direction) and the <11-20> direction is within ±?. The ? is determined by {arctan {k× (w/h)}}/13 for the trench having a height of h and a width of w. Herein, the k is at least smaller than 2, preferably 0.9 or less, more preferably 0.5 or less, and still more preferably 0.3 or less.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: August 11, 2020
    Assignees: National Institute of Advanced Industrial Science and Technology, Hitachi, Ltd, Fuji Electric Co., Ltd, Mitsubishi Electric Corporation
    Inventors: Ryoji Kosugi, Shiyang Ji, Kazuhiro Mochizuki, Yasuyuki Kawada, Hidenori Kouketsu
  • Publication number: 20200249104
    Abstract: Provided are a surface stress sensor that enables deterioration in measurement precision to be suppressed and a method for manufacturing the same. A surface stress sensor includes: a membrane configured to be bent by applied surface stress; a frame member configured to surround the membrane with gaps interposed therebetween when viewed from the thickness direction of the membrane; at least a pair of coupling portions configured to couple the membrane and the frame member; a flexible resistor configured to be disposed on at least one of the coupling portions and have a resistance value that changes according to bending induced in the coupling portion; and a support base member configured to be connected to the frame member and overlap the frame member when viewed from the thickness direction of the membrane, in which a cavity portion is disposed between the membrane and the support base member.
    Type: Application
    Filed: September 20, 2018
    Publication date: August 6, 2020
    Applicant: ASAHI KASEI KABUSHIKI KAISHA
    Inventors: Takanori MURAKAMI, Hidenori MOCHIZUKI, Daiki HIRASHIMA, Seiichi KATO, Kazuma KOMATSU
  • Publication number: 20190157399
    Abstract: A manufacturing yield and reliability of a semiconductor device including a power semiconductor element is improved. A plurality of trenches DT extending in an x direction and spaced apart from each other in a y direction orthogonal to the x direction are formed in a substrate having a main crystal surface tilted with respect to a <11-20> direction. Also, a super-junction structure is constituted of a p-type column region PC made of a semiconductor layer embedded in the trench DT and an n-type column region NC made of a part of the substrate between the trenches DT adjacent in the y direction, and an angle error between the extending direction of the trench DT (x direction) and the <11-20> direction is within ±?. The ? is determined by {arctan {k× (w/h)}}/13 for the trench having a height of h and a width of w. Herein, the k is at least smaller than 2, preferably 0.9 or less, more preferably 0.5 or less, and still more preferably 0.3 or less.
    Type: Application
    Filed: June 2, 2017
    Publication date: May 23, 2019
    Inventors: Ryoji Kosugi, Shiyang Ji, Kazuhiro Mochizuki, Yasuyuki Kawda, Hidenori Kouketsu
  • Patent number: 9623288
    Abstract: A table tennis ball faithfully reproduces the playing characteristics of celluloid table tennis balls without using celluloid, and a thermoplastic resin composition for table tennis balls provides a table tennis ball having an excellent balance of elastic modulus, impact resistance, and density. The table tennis ball is composed of a celluloid-free thermoplastic resin or thermoplastic resin composition having a flexural modulus according to ISO 178 of 1650 MPa or more, a Charpy impact strength according to ISO 179 of 20 kJ/m2 or more, and a density according to ISO 1183 of less than 1.20 g/cm3, has a diameter of 39.0 mm or more, and weighs 2.0 to 3.5 g.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: April 18, 2017
    Assignees: Nippon Takkyu Co., Ltd., Toray Industries, Inc.
    Inventors: Hidenori Mochizuki, Hitoshi Egawa, Tetsu Sato, Tadakatsu Takasaki, Satoshi Toki
  • Publication number: 20160074713
    Abstract: A table tennis ball faithfully reproduces the playing characteristics of celluloid table tennis balls without using celluloid, and a thermoplastic resin composition for table tennis balls provides a table tennis ball having an excellent balance of elastic modulus, impact resistance, and density. The table tennis ball is composed of a celluloid-free thermoplastic resin or thermoplastic resin composition having a flexural modulus according to ISO 178 of 1650 MPa or more, a Charpy impact strength according to ISO 179 of 20 kJ/m2 or more, and a density according to ISO 1183 of less than 1.20 g/cm3, has a diameter of 39.0 mm or more, and weighs 2.0 to 3.5 g.
    Type: Application
    Filed: April 16, 2014
    Publication date: March 17, 2016
    Inventors: Hidenori Mochizuki, Hitoshi Egawa, Tetsu Sato, Tadakatsu Takasaki, Satoshi Toki
  • Patent number: 9226924
    Abstract: A method treats or prevents neuropathic pain with a synergistically-enhanced analgesic effect at a dose at which a calcium channel ?2? ligand does not produce any side effects as well as which agent does not produce any new side effects on the central nervous system. The therapeutic agent or a prophylactic agent used in the method includes as effective ingredients a cyclohexane derivative or a pharmaceutically acceptable salt thereof or a prodrug thereof, and a calcium channel ?2? ligand.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: January 5, 2016
    Assignee: Toray Industries, Inc.
    Inventors: Naoki Izumimoto, Hidenori Mochizuki
  • Publication number: 20150105430
    Abstract: A method treats or prevents neuropathic pain with a synergistically-enhanced analgesic effect at a dose at which a calcium channel ?2? ligand does not produce any side effects as well as which agent does not produce any new side effects on the central nervous system. The therapeutic agent or a prophylactic agent used in the method includes as effective ingredients a cyclohexane derivative or a pharmaceutically acceptable salt thereof or a prodrug thereof, and a calcium channel ?2? ligand.
    Type: Application
    Filed: December 19, 2014
    Publication date: April 16, 2015
    Inventors: Naoki Izumimoto, Hidenori Mochizuki
  • Patent number: 8946267
    Abstract: A therapeutic agent or a prophylactic agent for neuropathic pain provides a synergistically-enhanced analgesic effect at a dose at which a calcium channel ?2? ligand does not produce any side effects as well as which agent does not produce any new side effects on the central nervous system. The therapeutic agent or a prophylactic agent for neuropathic pain includes as effective ingredients a cyclohexane derivative, represented by the following formula, or a pharmaceutically acceptable salt thereof or a prodrug thereof, and a calcium channel ?2? ligand.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: February 3, 2015
    Assignee: Toray Industries, Inc.
    Inventors: Naoki Izumimoto, Hidenori Mochizuki
  • Patent number: 8796301
    Abstract: An object of the present invention is to provide a drug with a high therapeutic or prophylactic effect on dyskinesia, without accompanying aggravation of symptoms of the primary disease, and with fewer side effects. Accordingly, the present invention provides a therapeutic or prophylactic agent for dyskinesia, comprising as an effective component a compound having a 4,5-epoxy morphinan skeleton, which compound is represented by the Formula (I) below, or a pharmaceutically acceptable acid addition salt thereof: [wherein the double line composed of a dashed line and a solid line represents a double bond or single bond, R1 is C4-C7 cycloalkylalkyl, R2 is C1-C5 straight or branched alkyl, and B is —CH?CH—.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: August 5, 2014
    Assignee: Toray Industries, Inc.
    Inventors: Ken Ikeda, Hidenori Mochizuki
  • Patent number: 8772837
    Abstract: A configuration of a lateral transistor suited for the hybrid-integration (BiCMOS) of a high-performance lateral transistor (HCBT) and a CMOS transistor, and a method for manufacturing the lateral transistor. A semiconductor device includes a HCBT 100 and a CMOS transistor 200 hybrid-integrated. The HCBT 100 has an open region 21 opened by etching a device isolating oxide film 6 surrounding an n-hill layer 11. An emitter electrode 31A and a collector electrode 31B are formed in the open region 21 and are composed of a polysilicon film having such a thickness as to expose the n-hill layer 11 exposed by etching the device isolating oxide film, and an ultrathin oxide film 24 covering at least a part of the n-hill layer 11. The ultrathin oxide film 24 functions as a protective film for protecting the n-hill layer 11 from being etched when the polysilicon film is etched.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: July 8, 2014
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Tomislav Suligoj, Marko Koricic, Hidenori Mochizuki, Soichi Morita
  • Publication number: 20140035063
    Abstract: A configuration of a lateral transistor suited for the hybrid-integration (BiCMOS) of a high-performance lateral transistor (HCBT) and a CMOS transistor, and a method for manufacturing the lateral transistor. A semiconductor device includes a HCBT 100 and a CMOS transistor 200 hybrid-integrated. The HCBT 100 has an open region 21 opened by etching a device isolating oxide film 6 surrounding an n-hill layer 11. An emitter electrode 31A and a collector electrode 31B are formed in the open region 21 and are composed of a polysilicon film having such a thickness as to expose the n-hill layer 11 exposed by etching the device isolating oxide film, and an ultrathin oxide film 24 covering at least a part of the n-hill layer 11. The ultrathin oxide film 24 functions as a protective film for protecting the n-hill layer 11 from being etched when the polysilicon film is etched.
    Type: Application
    Filed: September 20, 2013
    Publication date: February 6, 2014
    Applicant: Asahi Kasei Microdevices Corporation
    Inventors: Tomislav SULIGOJ, Marko KORICIC, Hidenori MOCHIZUKI, Soichi MORITA
  • Patent number: 8569866
    Abstract: A configuration of a lateral transistor suited for the hybrid-integration (BiCMOS) of a high-performance lateral transistor (HCBT) and a CMOS transistor, and a method for manufacturing the lateral transistor are provided. A semiconductor device includes a HCBT 100 and a CMOS transistor 200 hybrid-integrated therein. The HCBT 100 has an open region 21 opened by etching a device isolating oxide film 6 surrounding an n-hill layer 11, an emitter electrode 31A and a collector electrode 31B each of which is formed in the open region 21 and is composed of a polysilicon film having such a thickness as to expose the n-hill layer 11 exposed by etching the device isolating oxide film, and an ultrathin oxide film 24 covering at least a part of the n-hill layer 11. The ultrathin oxide film 24 functions as a protective film for protecting the n-hill layer 11 from being etched when the polysilicon film is etched to form the emitter electrode 31A and the collector electrode 31B.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: October 29, 2013
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Tomislav Suligoj, Marko Koricic, Hidenori Mochizuki, Soichi Morita
  • Publication number: 20130131120
    Abstract: A therapeutic agent or a prophylactic agent for neuropathic pain provides a synergistically-enhanced analgesic effect at a dose at which a calcium channel ?2? ligand does not produce any side effects as well as which agent does not produce any new side effects on the central nervous system. The therapeutic agent or a prophylactic agent for neuropathic pain includes as effective ingredients a cyclohexane derivative, represented by the following formula, or a pharmaceutically acceptable salt thereof or a prodrug thereof, and a calcium channel ?2? ligand.
    Type: Application
    Filed: July 29, 2011
    Publication date: May 23, 2013
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Naoki Izumimoto, Hidenori Mochizuki
  • Patent number: 8183256
    Abstract: A method of treating schizophrenia, which method can treat especially positive symptoms of schizophrenia and does not cause impaired information processing related to cognitive deficiencies or the like which is a symptom of schizophrenia. The method of treating schizophrenia includes as an effective ingredient a compound having a specific morphinan skeleton or a pharmaceutically acceptable acid addition salt thereof.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: May 22, 2012
    Assignee: Toray Industries, Inc.
    Inventors: Satoru Yoshikawa, Hidenori Mochizuki
  • Publication number: 20110266630
    Abstract: A configuration of a lateral transistor suited for the hybrid-integration (BiCMOS) of a high-performance lateral transistor (HCBT) and a CMOS transistor, and a method for manufacturing the lateral transistor are provided. A semiconductor device includes a HCBT 100 and a CMOS transistor 200 hybrid-integrated therein. The HCBT 100 has an open region 21 opened by etching a device isolating oxide film 6 surrounding an n-hill layer 11, an emitter electrode 31A and a collector electrode 31B each of which is formed in the open region 21 and is composed of a polysilicon film having such a thickness as to expose the n-hill layer 11 exposed by etching the device isolating oxide film, and an ultrathin oxide film 24 covering at least a part of the n-hill layer 11. The ultrathin oxide film 24 functions as a protective film for protecting the n-hill layer 11 from being etched when the polysilicon film is etched to form the emitter electrode 31A and the collector electrode 31B.
    Type: Application
    Filed: December 19, 2008
    Publication date: November 3, 2011
    Applicant: ASAHI KASEI MICRODEVICES CORPORATION
    Inventors: Tomislav Suligoj, Marko Koricic, Hidenori Mochizuki, Soichi Morita
  • Publication number: 20100160364
    Abstract: A composition includes a therapeutic or prophylactic agent for schizophrenia, which therapeutic or prophylactic agent can treat especially positive symptoms of schizophrenia and does not cause impaired information processing related to cognitive deficiencies or the like which is a symptom of schizophrenia. The therapeutic or prophylactic agent for schizophrenia includes as an effective ingredient a compound having a specific morphinan skeleton or a pharmaceutically acceptable acid addition salt thereof.
    Type: Application
    Filed: June 20, 2008
    Publication date: June 24, 2010
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Satoru Yoshikawa, Hidenori Mochizuki
  • Publication number: 20100130524
    Abstract: An object of the present invention is to provide a drug with a high therapeutic or prophylactic effect on dyskinesia, without accompanying aggravation of symptoms of the primary disease, and with fewer side effects. Accordingly, the present invention provides a therapeutic or prophylactic agent for dyskinesia, comprising as an effective component a compound having a 4,5-epoxy morphinan skeleton, which compound is represented by the Formula (I) below, or a pharmaceutically acceptable acid addition salt thereof: [wherein the double line composed of a dashed line and a solid line represents a double bond or single bond, R1 is C4-C7 cycloalkylalkyl, R2 is C1-C5 straight or branched alkyl, and B is —CH?CH—.
    Type: Application
    Filed: April 24, 2008
    Publication date: May 27, 2010
    Inventors: Ken Ikeda, Hidenori Mochizuki
  • Patent number: 6956046
    Abstract: A compound represented by the following Formula (I): (wherein A represents oxygen atom or —NR3— (R3 represents hydrogen atom or lower alkyl group); R1 represents nitro group, lower alkoxycarbonyl group, carbamoyl group unsubstituted or mono- or di-substituted by lower alkyl group, unprotected or protected hydroxyl group, unprotected or protected carboxyl group, lower alkyl group substituted by unprotected or protected hydroxyl group, or tetrazolyl group; and R2 represents hydrogen atom, cyano group or lower alkylsulfonyl group, provided that when A is —NR3—, it is excluded that R1 represents unprotected or protected hydroxyl group or lower alkyl group substituted by unprotected or protected hydroxyl group) or its salt, and method for producing the compound, and a pharmaceutical composition containing the compound as active ingredient.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: October 18, 2005
    Assignee: Mochida Pharmaceutical Co., Ltd.
    Inventors: Ichiro Yamamoto, Kazuyuki Matsuura, Kazuhiro Suzuki, Kazuo Kato, Yasushige Akada, Hidenori Mochizuki, Akihito Shimoi
  • Publication number: 20040176410
    Abstract: A compound represented by the following Formula (I): 1
    Type: Application
    Filed: November 25, 2003
    Publication date: September 9, 2004
    Inventors: Ichiro Yamamoto, Kazuyuki Matsuura, Kazuhiro Suzuki, Kazuo Kato, Yasushige Akada, Hidenori Mochizuki, Akihito Shimoi
  • Patent number: 6472259
    Abstract: A method for manufacturing a semiconductor device comprising a nonvolatile memory transistor of a stacked gate structure having a floating gate and a control gate, and a MOS transistor of a single gate structure, wherein the method comprises the steps of forming a first insulation film that becomes a gate oxide film of the transistors on a semiconductor substrate; forming a first conductive layer on the first insulation film; removing, from the first conductive layer, a region for separating a floating gate in a direction perpendicular to a direction in which the control gate is formed extendedly; forming a second insulation layer on the first conductive layer; forming a second conductive layer on the second insulation film; patterning the second conductive layer so as to form the control gate; and patterning the first conductive layer to form the stacked gate structure and the single gate structure.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: October 29, 2002
    Assignee: Asahi Kasei Microsystems Co., Ltd.
    Inventors: Fumio Naito, Hisaya Imai, Hidenori Mochizuki