Abstract: An information processing apparatus comprising a secure information unit that is set to the state not requiring security in the case where the data is transferred from a user memory space to a general purpose register, and that is set to the state requiring security in the case where the data is transferred from a secure memory space to the general purpose register. An encryption key in the secure memory space is prevented from being stolen by prohibiting the data transfer to the user memory space from the general purpose register with the value of the secure information unit set to the state requiring security.

Abstract: A memory control apparatus is capable of surely becoming consistent with an external memory while avoiding a deterioration in access efficiency to the external memory. The memory control apparatus includes: a data buffer and an address buffer which respectively store data and addresses related to past access requests from a first master; a first comparison unit which compares a new address with the address of the address buffer upon receiving the new address; a buffer control unit which performs one of issuing an access request to an external memory I/F or outputting the data in the data buffer to the first master, depending on the comparison result; a specific access detection unit which disables the contents of the data buffer irrespective of the comparison result.

Abstract: A memory control apparatus is capable of surely becoming consistent with an external memory while avoiding a deterioration in access efficiency to the external memory. The memory control apparatus includes: a data buffer and an address buffer which respectively store data and addresses related to past access requests from a first master; a first comparison unit which compares a new address with the address of the address buffer upon receiving the new address; a buffer control unit which performs one of issuing an access request to an external memory I/F or outputting the data in the data buffer to the first master, depending on the comparison result; a specific access detection unit which disables the contents of the data buffer irrespective of the comparison result.

Abstract: In an arrangement in which a CPU transmits data such as audio data through a 32-bit data bus, a format conversion device and a format conversion program are a are newly prepared. Further, input data having a first bit-width (32 bit width) is converted to output data having a second bit-width (24 bit width) in accordance with a predetermined system so that the efficiency of use of the bus at the time of transmitting data is improved; thus, it becomes possible to reduce a data memory area required for multi-media processes.

Abstract: An information processing apparatus is disclosed, in which the value of a secure information unit is set to the state not requiring security in the case where the data is transferred from a user memory space to a general purpose register, and the value of the secure information unit is set to the state requiring security in the case where the data is transferred from a secure memory space to the general purpose register. An encryption key in the secure memory space is prevented from being stolen by prohibiting the data transfer to the user memory space from the general purpose register with the value of the secure information unit set to the state requiring security.

Abstract: In an arrangement in which a CPU transmits data such as audio data through a 32-bit data bus, a format conversion device and a format conversion program are a are newly prepared. Further, input data having a first bit-width (32 bit width) is converted to output data having a second bit-width (24 bit width) in accordance with a predetermined system so that the efficiency of use of the bus at the time of transmitting data is improved; thus, it becomes possible to reduce a data memory area required for multi-media processes.