Abstract: A cache mode selection method and system sets to a cache load inhibit mode a cache mode used for a random access dataset of lower access hit ratio if use ratio of a data transmission path exceeds beyond an upper use ratio limit. It also sets to the cache load inhibit mode the cache mode used by parts of a sequential access dataset. These make it possible to select a proper cache mode depending on state of a load dynamically to prevent an I/O response from decreasing so that the hit ratio can be increased.

Abstract: A virtual machine control method for a supercomputer enables a plurality of virtual machines to use a vector processor. Control of the use of the vector processor is through the scalar processor. When a virtual machine requires use of the vector processor, it is first determined whether one of the other virtual machines operating systems is using the vector processor. If not, the scalar processor is dispatched to the operating system requesting use of the vector processor. If another virtual machine operating system is using the vector processor, then the operating system requesting use of the vector processor is placed in a wait state until the vector processor becomes free, whereupon the scalar processor is dispatched to the operating system that had been in the wait state. The condition of the vector processor being free can be communicated directly to the scalar processor without the intervention of the virtual machine monitor.

Abstract: A plural-OS run system in which a plurality of operating systems (OSs) capable of operating on machines of different architectures, respectively, are allowed to run on one bare machine under the control of one control program (CP) or one control means. The input/output instruction and input/output interrupt of the operating system capable of running on a machine of the same architecture as that of the bare machine are directly executed on the bare machine without need for translation of the format. The input/output instruction and the input/output interrupt of the operating system adapted to run on a machine of the architecture differing from that of the bare machine are allowed to be directly executed while translating the format.

Abstract: An absolute address translated from a logical address input by a user program by an address translation circuit and a prefix translation circuit, is compared with contents of a virtual processor prefix register. On the basis of the comparison result, a multi-processor field of a translation lookaside buffer (TLB) has a value indicating whether or not the entry corresponds to an area common among virtual processors. The MP field of the TLB is compared with contents of the multi-processor register, and a virtual processor field of the TLB is compared with contents of a virtual processor register. If the value coincides with the multi-processor field or if the value does not coincide with the multi-processor field and the value coincides with the virtual processor field, contents of an absolute address field of the TLB are input to an absolute address register. This increases the effective capacity and utilization of the TLB to avoid decreasing of performance of the virtual machines.

Abstract: A system and method for continuous operation of a virtual machine system having operation modes including a guest mode in which virtual machines are operated and a nonguest mode in which a virtual machine monitor for controlling the virtual machines is operated. The continuous guest is a virtual machine which does not stop executing operation at the occurrence of a failure due to program error of the virtual machine monitor. A main storage is provided with two areas. One of the two areas is a continuous guest area having the same host absolute address in the nonguest mode as a guest absolute address in the guest mode, the area is used by the continuous guest which is a virtual machine which continues to operate on transition of the operation mode from the guest mode to the nonguest mode. The other is an area in which a program module for dispatching the continuous guest in response to the transition of the operation mode from the guest mode to the nonguest mode.

Abstract: In a computer system having a central processing unit, a main storage and at least one I/O device, a plurality of operating systems (OS) can simultaneously run under the control of a control program. For executing an I/O instruction using a central processing unit, a plurality of resident areas of said main storage which do not overlap one another are assigned, under the control of the control program, to the plurality of OSs as main memories therefore, respectively. In responding to an I/O instruction issued by a running one of said plural OSs, an address of said main memory assigned to said running OS which participates in an I/Oo operation requested by said I/O instruction is determined without intervention of the control program, and the address is translated into an address of the main storage of the computer system without intervention of said control program. The I/O operation is then executed by using the address resulting from said address translation.

Abstract: An OS control method for controlling an operating system (OS) running in a computer system on which a plurality of OSs run and which includes an instruction processor, a control program for controlling running of a plurality of OSs, a main storage, an external storage device, and an address translation circuit. In the course of processing performed by the instruction processor, predetermined operation of the instruction processor is monitored to output trace data affixed with an address conforming to the running OS in accordance with predetermined conditions for the predetermined operation. Address for the running OS is translated into a real address on the main storage. A debugging assist unit outputs trace data to one of plural storing areas of the main storage corresponding to the running OS at the translated real address.

Abstract: A method and an apparatus for configuring multiple absolute address spaces are disclosed which simultaneously operate a plurality of virtual machines (VMs) respectively having operating systems on a single real computer by allocating a plurality of logical address spaces to an absolute address space. A different absolute address space is allocated to each of the VMs, whereby the respective VMs can access a main storage with a designated address without adding a constant to the designated address.

Abstract: A virtual machine system in which a plurality of operating systems (OS's) can run on one computer including a physical main storage (physical MS), and at least one physical extended storage (physical ES), each operating system (OS) of the OS's having a virtual MS on the physical MS and at least one virtual ES on the at least one physical ES.

Abstract: In a computer system capable of being configured in a multiprocessor system, a plurality of virtual machines are grouped by object of use to define a plurality of processor groups. Each processor has an identifier for a processor group to which it belongs. When an instruction which requires synchronous execution among the processors is executed, the processor identifies the processor group to which it belongs and requests the synchronous execution of the instruction to only the processors in the group. In another aspect, each processor which has a request for execution refers to its own identifier to determine if the request is from a processor of the same group in order to determine whether it should execute the instruction or not. When the processor completes the execution of the instruction, it sends an end signal to the requesting processor so that another instruction from other processors in the same group can be executed.

Abstract: In a virtual machine system in which a virtual machine directly executes operations by use of the hardware without an intervention from the virtual machine control program (VMCP), at an occurrence of an input/output interruption, the system sets to a storage an event that the input/output interruption has been accepted and reserved by the VMCP. When the virtual machine processes interruption information by means of the hardware without an intervention of the VMCP, the virtual machine resets the state of the storage. When the virtual machine is set to an interruptible state, control is passed to the VMCP. The VMCP tests to determine whether or not the virtual machine has reset the state of the storage, thereby judging an acceptability of the interruption.

Abstract: An address translation apparatus is provided which has an address translation look-aside buffer with an entry composed of a real address field, virtual machine identifier field and space identifier field. For the translation look-aside buffer entry to be used by a general virtual machine which uses a plurality of address spaces, a virtual machine identifier for discrimination of a general virtual machine is stored in the virtual machine identifier field, and information used in discriminating an address space is stored in the space identifier field. For the translation look-aside buffer entry to be used by a dynamic address translation off (DATOFF virtual) machine which uses a single address space, an identifier commonly assigned to a group of DATOFF virtual machines is stored in the virtual machine identifier field, and a control block address used in discriminating a DATOFF virtual machine is stored in the space identifier field.

Abstract: In a virtual machine system (VMS) capable of concurrently running at least one operating system (OS) under one real computer system and a control program (VMCP) for controlling the VMS, the object is to reduce the overhead produced for simulating VM I/Os by direct I/O execution. A VM information area of a real sub-channel control block has a status field in which a flag indicating that the sub-channel is dedicated or not is contained. When the flag is "1", it means that the sub-channel is dedicated to the VM and the sub-channel scheduling by the VMCP is not necessary. As a real interruption priority order is dedicated to a VM, only I/O interruption requests of the VM are queued into the real interruption request queue of that dedicated priority order, and the mixing of VMs in that real interruption priority order is avoided.

Abstract: A method and a system in a virtual machine system controlling a simultaneous run of one or more operating systems (OS's) by use of a virtual machine control program on a real machine including a storage area for each virtual processor constituting the virtual machine for saving a status of each virtual processor, for storing an active flag indicating whether or not the virtual processor is in the active state, and for storing a running priority specified for each virtual processor by the control program wherein when an OS being running issues an instruction to set the processor to the wait state, the instruction is directly executed, a state of the virtual processor being running is stored in the status save area, a processor is selected from processors for which the nonactive state is set, a virtual processor is selected according to the running priority from a group of virtual processors not in the wait state nor in the active state, and a content of the status save area of the virtual processor is set to t

Abstract: An I/O control system in a virtual machine system has at least one virtual machine (VM) running under control of a virtual machine control program (VMCP) and has a direct I/O execution mode in which an I/O interruption to the I/O device dedicated by the running VM is directly executed without intervention of the VMCP and an indirect I/O execution mode in which the I/O interruption is simulated. The I/O control system comprises identification portion for identifying the I/O device requesting the switching to the direct I/O execution mode, judge portion for judging a mode switching condition and mode selection portion for selecting one of the two modes.

Abstract: In a virtual machine system (VMS) capable of concurrently running at least one operating system (OS) under one real computer system and a control program (VMCP) for controlling the VMS, the object is to reduce the overhead produced for simulating VM I/Os by direct I/O execution. A VM information area of a real sub-channel control block has a status field in which a flag indicating that the sub-channel is dedicated or not is contained. When the flag is "0", it means that the sub-channel is dedicated to the VM and the sub-channel scheduling by the VMCP is not necessary. As a real interruption priority order is dedicated to a VM, only I/O interruption requests of the VM are queued into the real interruption request queue of that dedicated priority order, and the mixing of VMs in that real interruption priority order is avoided.

Abstract: In order to carry out address translation which can reduce an overhead of the VMCP to support a virtual storage, a flag indicating a common segment in the virtual machine and a system identifier are held in a TLB, and a VM identifier is held in a segment table origin stack. For the common segment, a current VM identifier is compared with the VM identifier in the segment table origin stack to determine validity of a TLB entry, and for a non-common segment, a system identifier read from the segment table origin stack is compared with the system identifier in the TLB entry to determine validity of the TLB entry.