Patents by Inventor Hideo Arima
Hideo Arima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11929461Abstract: The present invention provides an electrolytic solution capable of providing an electrochemical device, such as a lithium ion secondary battery, or a module that has excellent high-temperature storage performance. The electrolytic solution contains: a homocyclic compound other than aromatic compounds; and a cyclic dicarbonyl compound. The homocyclic compound contains at least one group selected from the group consisting of a nitrile group and an isocyanate group.Type: GrantFiled: April 5, 2017Date of Patent: March 12, 2024Assignee: DAIKIN INDUSTRIES, LTD.Inventors: Kenzou Takahashi, Shinichi Kinoshita, Hideo Sakata, Shigeaki Yamazaki, Hiroyuki Arima
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Patent number: 6710610Abstract: Electrode pads are formed on a tape circuit to correspond to positions of solder bumps on an IC. A plurality of pins formed on a periphery of the tape circuit provide electrical connection between the tape circuit and a mother socket. An elastomer sheet is provided between a portion of the tape circuit, on which the electrode pads are formed and the IC is mounted, and the mother socket, and a side surface of the sheet, which contacts with the tape circuit, is formed with cut grooves in lattice fashion such that respective centers of the electrode pads substantially coincide with intersections of the grooves.Type: GrantFiled: September 29, 1999Date of Patent: March 23, 2004Assignee: Hitachi, Ltd.Inventors: Naotaka Tanaka, Hiroyuki Ohta, Ichiro Anjoh, Hideo Arima, Akio Hasebe, Kenichi Yamamoto
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Patent number: 5393406Abstract: A thin film multilayer wiring board-producing method of the present invention is intended to decrease thermal stresses developing during the formation of the multilayer construction, and also to greatly reduce the number of the steps of the process, as compared with a conventional method. A film material can be used as an insulating film of the multilayer wiring board, and is adhesively bonded to a predetermined portion. Wiring conductors are formed by electroplating. The wiring layers are repeated laminated to form the multilayer construction. A metallic film serving as an electrode is formed on one of upper and lower surfaces of a substrate, the metallic film being removed after a multilayer wiring is formed. A soluble insulating film is formed on a metallic undercoat film on the substrate, and grooves are formed in the soluble insulating film, and wiring conductors are formed in the grooves, using either electroplating or both electroplating and electroless plating.Type: GrantFiled: March 4, 1992Date of Patent: February 28, 1995Assignee: Hitachi, Ltd.Inventors: Hitoshi Yokono, Hideo Arima, Takashi Inoue, Naoya Kitamura
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Patent number: 5388328Abstract: A process for the fabrication of an interconnected multilayer board involves the steps of forming a metallic under-conductive layer on a base substrate, forming a windowed resist layer on the metallic under-conductive layer, filling windows of the resist layer with a conductor by plating thereby forming a conductor layer, forming another windowed resist layer on the conductor layer and filling windows of this resist layer with a conductor by plating, thereby forming a via-hole layer and to provide a two-level structure of the conductor layer and the via-hole layer. Thereafter, the resist layers and portions of the metallic under-conductor layer other than those in contact with a lower face of the conductor constituting the conductor layer are dissolved to form a two-level skeleton structure of conductor lines and spaces within the skeleton structure are filled with a varnish in a solventless form and the varnish is cured.Type: GrantFiled: January 28, 1994Date of Patent: February 14, 1995Assignee: Hitachi, Ltd.Inventors: Hitoshi Yokono, Hideo Arima, Takashi Inoue, Naoya Kitamura, Haruhiko Matsuyama, Hitoshi Oka, Fumio Kataoka, Fusaji Shoji, Hideyasu Murooka, Masayuki Kyooi
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Patent number: 5375042Abstract: A semiconductor package and an electronic circuit board in which the semiconductor package is mounted on an external circuit board. The semiconductor package has a substrate assembly and a semiconductor mounted on the substrate, where the substrate assembly is composed of a thick film circuit in the form of a ceramic circuit board and a pair of thin film circuits disposed one on each of opposite surfaces of the thick film circuits. Such a substrate assembly has one surface thereof connected to, i.e. electrically contacting, the semiconductor and an opposing surface thereof adapted to be connected to an external circuit. The thin film circuits of the assembly are formed of a heat-resisting resin and a conducting material.Type: GrantFiled: November 29, 1991Date of Patent: December 20, 1994Assignee: Hitachi, Ltd.Inventors: Hideo Arima, Kiyoshi Matsui, Kenji Takeda
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Patent number: 5300735Abstract: Described herein are interconnected mutilayer boards and their fabrication processes. Multilayer conductor lines of a skeleton structure are formed by conducting multilayer metallization while including all resist layers and metallic under-conductive layers and then removing the resist layers and metallic under-conductive layers at once. Spaces between the multilayer conductor lines of the skeleton structure are then filled with a solventless varnish so that insulating layers are formed. Modules making use of such interconnected multilayer boards and computers having such modules are also described.Type: GrantFiled: March 22, 1993Date of Patent: April 5, 1994Assignee: Hitachi, Ltd.Inventors: Hitoshi Yokono, Hideo Arima, Takashi Inoue, Naoya Kitamura, Haruhiko Matsuyama, Hitoshi Oka, Fumio Kataoka, Fusaji Shoji, Hideyasu Murooka, Masayuki Kyooi
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Patent number: 5281151Abstract: A semiconductor chip carrier, an electronic module having the semiconductor chip carrier mounted therein, and an electronic device incorporating the electronic module. A semiconductor chip carrier comprises a multi-layer wiring substrate including a multi-layer ceramic board, and a thin film circuit mounted on said multi-layer ceramic board, and a semiconductor chip mounted and connected to the thin film circuit, wherein a low-resistance conductor path is provided on the surface of or in the multi-layer wiring substrate to connect between signal terminals which need to be connected with a low-resistance wire in the semiconductor chip, thereby realizing signal transmission at low resistance between the signal terminals of the semiconductor chip by this conductor path. This arrangement makes it possible to shorten the signal delay time of a semiconductor chip, and achieve higher speed signal processing in modules and electronic equipment in which a thus-improved semiconductor chip is used.Type: GrantFiled: June 23, 1992Date of Patent: January 25, 1994Assignee: Hitachi, Ltd.Inventors: Hideo Arima, Kenji Takeda, Hideho Yamamura, Fumiyuki Kobayashi
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Patent number: 5236630Abstract: This invention provides a conductor paste having a low resistivity (about 10 .mu..OMEGA..cm or below) and capable of retaining a film thickness of 25 to 35 .mu.m after baking by composing the paste from 85 to 96 wt. % of a metal powder having a resistivity of 10 .mu..OMEGA..cm or below and 4 to 15 wt. % of an organic vehicle containing 5 to 13 wt. % of a binder. The invention also provides a process for producing the above-described conductor paste, in which 85 to 96 wt. % of a metal powder having a resistivity of 10 .mu..OMEGA..cm or below and 4 to 15 wt. % of an organic vehicle containing 5 to 13 wt. % of a binder are forcibly passed between the barrel-shaped rolls in a kneader and thereby kneaded to form a paste, wherein the roll interval in the kneader is adjusted so that the smallest distance between the adjoining barrel-shaped rolls becomes 5 .mu.m or less and the shear rate therebetween is set at 1,000 s.sup.-1 or more.Type: GrantFiled: August 2, 1990Date of Patent: August 17, 1993Assignee: Hitachi, Ltd.Inventors: Hideo Arima, Takashi Kuroki, Masao Sekihata, Mituru Fujii, Mutsumi Horikoshi
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Patent number: 5162240Abstract: A thick and thin film hybrid multilayer wiring substrate includes an adjustment layer provided between a thick film circuit and a thin film circuit in order to adjust positions of the thick film circuit and the thin film circuit with high integration and large area of the thick and thin film hybrid substrate. The adjustment layer is formed using a direct printing process in accordance with dispersion of the shape of the thick film circuit substrate to absorb the dispersion of the substrate. Further, in order to absorb dispersion of contraction of the thick film substrate due to sintering, a position of a mark provided on the substrate is detected by an electron beam and thereafter a connection pattern is formed to be connected to a regular pattern.Type: GrantFiled: June 12, 1990Date of Patent: November 10, 1992Assignee: Hitachi, Ltd.Inventors: Norio Saitou, Hideo Todokoro, Katsuhiro Kuroda, Satoru Fukuhara, Genya Matsuoka, Hideo Arima, Hitoshi Yokono, Takashi Inoue, Hidetaka Shigi
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Patent number: 4715673Abstract: An optical switch having a small number of optical connections includes a substrate in which are provided a first light path for conducting optical signals and a second light path consisting of a photosensitive element and light emitting element in pairs. An optical fiber cable is interrupted by the substrate, and optical signals in the fiber cable are transmitted through the first light path or intervened by an electrical system through the second light path in response to the switching movement of the substrate.Type: GrantFiled: May 1, 1986Date of Patent: December 29, 1987Assignee: Hitachi, Ltd.Inventors: Takanobu Noro, Yasumasa Koakutsu, Tamio Takeuchi, Masao Yano, Seiichi Onoda, Hideo Arima, Hitoshi Yokono, Hirayoshi Tanei
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Patent number: 4638443Abstract: A gas detecting apparatus incorporates a number of gas detecting elements which react with a variety of gases and exhibit gas sensitivities differing from one another in dependence on the gas species. The detection patterns obtained by quantitizing the detection outputs of the gas detecting elements are compared with a plurality of standard patterns prepared previously for assumed combinations of gas species and concentrations thereof. On the basis of the standard pattern which is same or most similar to the detection pattern, the gas species is identified.Type: GrantFiled: February 21, 1984Date of Patent: January 20, 1987Assignee: Hitachi, Ltd.Inventors: Masayoshi Kaneyasu, Hideo Arima, Mitsuko Ito, Shoichi Iwanaga, Nobuo Sato, Takanobu Noro, Akira Ikagami, Tokio Isogai
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Patent number: 4603008Abstract: Disclosed herein is a critical temperature sensitive resistor material which comprises 60 to 90% by weight of VO.sub.2 and 40 to 10% by weight of RuO.sub.2. This material exhibits hysteresis of resistance that decreases remarkably over a temperature range in which the resistance varies greatly, and is hence used for measuring the temperature maintaining a high precision.Type: GrantFiled: June 27, 1985Date of Patent: July 29, 1986Assignee: Hitachi, Ltd.Inventors: Hiromi Tosaki, Hideo Arima, Akira Ikegami, Yasuji Kamata
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Patent number: 4587040Abstract: A thick film thermistor composition is prepared by mixing metal oxide powders of at least two of Mn, Co and Ni, and oxide powder of Ru as a noble metal, firing the resulting mixture, thereby obtaining a compound oxide thermistor of spinel structure, pulverizing the resulting compound oxide thermistor, and mixing and kneading the resulting thermistor powder with glass powder and oxide powder of Ru for adjusting a resistance.Type: GrantFiled: February 28, 1979Date of Patent: May 6, 1986Assignee: Hitachi, Ltd.Inventors: Hiromi Tosaki, Teruo Mozume, Hideo Arima, Akira Ikegami
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Patent number: 4586143Abstract: A gas detecting apparatus is disclosed in which detection outputs from a plurality of semiconductor gas detecting elements different in gas detection characteristic from each other and previously-obtained characteristic values of the semiconductor gas detecting elements for a mixed gas are subjected to operational processing to detect one or more specified constituent gases contained in the mixed gas, and in which when the specified constituent gas is detected, the detection information is announced by some means, and also the supply of gas is stopped or a supply gas is diluted.Type: GrantFiled: January 28, 1983Date of Patent: April 29, 1986Assignee: Hitachi, Ltd.Inventors: Masayoshi Kaneyasu, Takanobu Noro, Hideo Arima, Mitsuko Ito, Shoichi Iwanaga, Nobuo Sato, Akira Ikegami, Tokio Isogai
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Patent number: 4481499Abstract: A gas detector with a layer of gas sensing material comprising an oxide semiconductor, wherein at least one coating layer each of a p-type oxide semiconductor and an n-type oxide semiconductor is provided in a multi-layer arrangement on the surface of said layer of gas sensing material that contacts the gas. The gas detector can selectively identify only specific gases.Type: GrantFiled: April 27, 1983Date of Patent: November 6, 1984Assignee: Hitachi, Ltd.Inventors: Hideo Arima, Masayoshi Kaneyasu, Mitsuko Ito
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Patent number: 4457161Abstract: A gas detection device and a method for detecting a gas where gas information including concentrations of gas components in a mixed gas, concentration, presence of specific gas components and the like is detected by measuring, e.g., the output voltages of a plurality of gas sensors having different gas selectivities. The gas selectivities, as a characteristic constant of the specific gas sensor, was previously determined. The measured output voltages and gas selectivities are then used for solving plural simultaneous equations for gas concentrations.Type: GrantFiled: April 7, 1981Date of Patent: July 3, 1984Assignee: Hitachi, Ltd.Inventors: Shoichi Iwanaga, Nobuo Sato, Akira Ikegami, Tokio Isogai, Takanobu Noro, Hideo Arima
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Patent number: 4386387Abstract: A porcelain composition comprising Pb(Fe.sub.2/3 W.sub.1/3)O.sub.3, PbTiO.sub.3 and Pb(Yb.sub.1/2 Nb.sub.1/2)O.sub.3 preferably within the range as defined by closed area of A-B-C-D-A in the accompanying triangular diagram can give a sintered product by sintering at a temperature as low as 1000.degree. C. or lower. The resulting sintered product has a high relative dielectric constant and a small dielectric loss tangent.Type: GrantFiled: November 16, 1981Date of Patent: May 31, 1983Assignee: Hitachi Chemical Company, Ltd.Inventors: Hirayoshi Tanei, Akira Ikegami, Hideo Arima, Tokio Isogai, Kiyoshi Kawabata
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Patent number: 4361597Abstract: A sensor for detecting a fluid flow velocity or flow amount with high precision and high reliability is made by applying a conductor paste comprising platinum powder and an organic vehicle to the outer surface of a fine inorganic insulating tube, followed by drying and firing, thereby forming a platinum film, processing the platinum film into a spiral band form by laser application, inserting a lead wire into the insulating tube, applying a platinum conductor paste to between the spiral platinum band and the lead wire, followed by drying and baking, thereby connecting the spiral platinum band film to the lead wire.Type: GrantFiled: January 27, 1981Date of Patent: November 30, 1982Assignee: Hitachi, Ltd.Inventors: Hideo Arima, Mituko Ito, Akira Ikegami, Sadayasu Ueno, Kanemasa Sato, Yutaka Nishimura
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Patent number: 4347166Abstract: A thermistor composition comprises oxide powder of at least two of Mn, Co, and Ni, and an oxide powder of Ru as a noble metal.Type: GrantFiled: February 22, 1979Date of Patent: August 31, 1982Assignee: Hitachi, Ltd.Inventors: Hiromi Tosaki, Hideo Arima, Teruo Mozume, Akira Ikegami, Tokio Isogai, Ichiro Tsubokawa