Patents by Inventor Hideo HARIFUCHI

Hideo HARIFUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11626432
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device that are configured to suppress the occurrence of noise and white blemishes in an amplification transistor having an element separation region which is formed by ion implantation. An amplification transistor has an element separation region formed by ion implantation. A channel region insulating film which is at least a part of a gate insulating film above a channel region of the amplification transistor is thin compared to a gate insulating film of a selection transistor, and an element separation region insulating film which is at least a part of a gate insulating film above the element separation region of the amplification transistor is thick compared to the channel region insulating film. The present disclosure can be applied to, for example, a CMOS image sensor, etc.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 11, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke Otake, Toshifumi Wakano, Takuya Sano, Yusuke Tanaka, Keiji Tatani, Hideo Harifuchi, Eiichi Tauchi, Hiroki Iwashita, Akira Matsumoto
  • Publication number: 20190326338
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device that are configured to suppress the occurrence of noise and white blemishes in an amplification transistor having an element separation region which is formed by ion implantation. An amplification transistor has an element separation region formed by ion implantation. A channel region insulating film which is at least a part of a gate insulating film above a channel region of the amplification transistor is thin compared to a gate insulating film of a selection transistor, and an element separation region insulating film which is at least a part of a gate insulating film above the element separation region of the amplification transistor is thick compared to the channel region insulating film. The present disclosure can be applied to, for example, a CMOS image sensor, etc.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 24, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke OTAKE, Toshifumi WAKANO, Takuya SANO, Yusuke TANAKA, Keiji TATANI, Hideo HARIFUCHI, Eiichi TAUCHI, Hiroki IWASHITA, Akira MATSUMOTO
  • Patent number: 10347673
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device that are configured to suppress the occurrence of noise and white blemishes in an amplification transistor having an element separation region which is formed by ion implantation. An amplification transistor has an element separation region formed by ion implantation. A channel region insulating film which is at least a part of a gate insulating film above a channel region of the amplification transistor is thin compared to a gate insulating film of a selection transistor, and an element separation region insulating film which is at least a part of a gate insulating film above the element separation region of the amplification transistor is thick compared to the channel region insulating film. The present disclosure can be applied to, for example, a CMOS image sensor, etc.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: July 9, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Otake, Toshifumi Wakano, Takuya Sano, Yusuke Tanaka, Keiji Tatani, Hideo Harifuchi, Eiichi Tauchi, Hiroki Iwashita, Akira Matsumoto
  • Publication number: 20170236859
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device that are configured to suppress the occurrence of noise and white blemishes in an amplification transistor having an element separation region which is formed by ion implantation. An amplification transistor has an element separation region formed by ion implantation. A channel region insulating film which is at least a part of a gate insulating film above a channel region of the amplification transistor is thin compared to a gate insulating film of a selection transistor, and an element separation region insulating film which is at least a part of a gate insulating film above the element separation region of the amplification transistor is thick compared to the channel region insulating film. The present disclosure can be applied to, for example, a CMOS image sensor, etc.
    Type: Application
    Filed: August 6, 2015
    Publication date: August 17, 2017
    Inventors: Yusuke OTAKE, Toshifumi WAKANO, Takuya SANO, Yusuke TANAKA, Keiji TATANI, Hideo HARIFUCHI, Eiichi TAUCHI, Hiroki IWASHITA, Akira MATSUMOTO