Abstract: Provided is a beta-alumina-based solid electrolyte sheet capable of increasing the first charge and discharge capacities and rapid charge and discharge characteristics of an all-solid-state sodium secondary battery. A solid electrolyte sheet contains ?-alumina and/or ??-alumina and satisfies C1>C2 where C1 represents a concentration of Na2O in a surface of the solid electrolyte sheet and C2 represents a concentration of Na2O in a middle of a thickness direction of the solid electrolyte sheet.

Abstract: A short-circuit detecting circuit which can accurately detect an output short-circuit of a class-D amplifier by a simple circuit construction. Two comparison pulse signals are formed on the basis of predetermined generating threshold values and a signal level of each of two output stage input pulse signals which are formed on the basis of an input pulse signal to the class-D amplifier and are supplied to an output stage of the class-D amplifier. A signal level of an output pulse from the class-D amplifier in a period of time corresponding to a pulse width of each of the comparison pulse signals is compared with a predetermined detection threshold values. A short-circuit detection signal is outputted in accordance with obtained level comparison results.

Abstract: In a semiconductor device, when a voltage regulator is halted from operating and a test supply voltage is supplied to second logics, the device is initialized by a reset signal. A register included in the device is then reset by an input signal via first logics. The voltage regulator is halted by a power-down signal. Testing is then carried out as the test supply voltage is applied to the second logics. When plural test items are executed successively, a test reset signal is applied to a test reset terminal for each item. As the initialized state of the register is canceled, the first and second logics are initialized.

Abstract: A short-circuit detecting circuit which can accurately detect an output short-circuit of a class-D amplifier by a simple circuit construction. Two comparison pulse signals are formed on the basis of predetermined generating threshold values and a signal level of each of two output stage input pulse signals which are formed on the basis of an input pulse signal to the class-D amplifier and are supplied to an output stage of the class-D amplifier. A signal level of an output pulse from the class-D amplifier in a period of time corresponding to a pulse width of each of the comparison pulse signals is compared with a predetermined detection threshold values. A short-circuit detection signal is outputted in accordance with obtained level comparison results.

Abstract: In a semiconductor device, when a voltage regulator is halted from operating and a test supply voltage is supplied to second logics, the device is initialized by a reset signal. A register included in the device is then reset by an input signal via first logics. The voltage regulator is halted by a power-down signal. Testing is then carried out as the test supply voltage is applied to the second logics. When plural test items are executed successively, a test reset signal is applied to a test reset terminal for each item. As the initialized state of the register is canceled, the first and second logics are initialized.

Abstract: In a semiconductor device, when a voltage regulator is halted from operating and a test supply voltage is supplied to second logics, the device is initialized by a reset signal. A register included in the device is then reset by an input signal via first logics. The voltage regulator is halted by a power-down signal. Testing is then carried out as the test supply voltage is applied to the second logics. When plural test items are executed successively, a test reset signal is applied to a test reset terminal for each item. As the initialized state of the register is canceled, the first and second logics are initialized.

Abstract: In a semiconductor device, when a voltage regulator is halted from operating and a test supply voltage is supplied to second logics, the device is initialized by a reset signal. A register included in the device is then reset by an input signal via first logics. The voltage regulator is halted by a power-down signal. Testing is then carried out as the test supply voltage is applied to the second logics. When plural test items are executed successively, a test reset signal is applied to a test reset terminal for each item. As the initialized state of the register is canceled, the first and second logics are initialized.

Abstract: An IC socket includes a base portion having a support portion for supporting an IC device, and an external connection terminal for inputting a signal to the IC device and outputting a signal from the IC device; a lid portion having a pressing portion with a movable first projecting portion for pressing the IC device, and a fixing portion to be fixed to the base portion; and a first hinge for supporting the base portion and the lid portion to be movable.