Patents by Inventor Hideo Niki

Hideo Niki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory and method of testing semiconductor memory
    Patent number: 6731561
    Abstract: A semiconductor memory includes a group of memory cells arrayed in a matrix, memory cell electric power source lines configured to connect the respective memory cells arrayed in a direction of rows of the group of memory cells of each of the rows, two electric power source terminals configured to be mutually independent, and switches configured to be connected between the memory cell electric power source lines and the two electric power source terminals respectively, to be controlled to turn ON/OFF by a inversion logic operation based on a test mode switching signal for switching to and from a test mode and a normal operation mode, and to connect the memory cell power source line to either of the two electric power source terminals according to the ON/OFF control.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: May 4, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Abe, Kenta Kaneeda, Hiroo Ota, Hideo Niki
  • Semiconductor memory and method of testing semiconductor memory
    Publication number: 20020176306
    Abstract: A semiconductor memory includes a group of memory cells arrayed in a matrix, memory cell electric power source lines configured to connect the respective memory cells arrayed in a direction of rows of the group of memory cells of each of the rows, two electric power source terminals configured to be mutually independent, and switches configured to be connected between the memory cell electric power source lines and the two electric power source terminals respectively, to be controlled to turn ON/OFF by a inversion logic operation based on a test mode switching signal for switching to and from a test mode and a normal operation mode, and to connect the memory cell power source line to either of the two electric power source terminals according to the ON/OFF control.
    Type: Application
    Filed: March 15, 2002
    Publication date: November 28, 2002
    Inventors: Mitsuhiro Abe, Kenta Kaneeda, Hiroo Ota, Hideo Niki