Patents by Inventor Hideo Nikou

Hideo Nikou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5500386
    Abstract: A method of manufacturing a semiconductor device, where on top of a substrate having already-completed circuit elements and wiring, etc., an insulation underlayer a, Pt layer for a bottom electrode, a dielectric film and a Pt layer for a top electrode are shaped.A top electrode, capacitance insulation film and bottom electrode are formed by etching the Pt layer for the top electrode or the Pt layer for the bottom electrode using an etching gas contained an S component while composing a Pt and S compound. Alternatively the Pt and S compound can be composed first, and then the compound can be etched.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 19, 1996
    Assignee: Matsushita Electronics Corporation
    Inventors: Shoji Matsumoto, Hideo Nikou, Satoshi Nakagawa
  • Patent number: 5492855
    Abstract: A method of manufacturing a semiconductor device, where on top of a substrate having already-completed circuit elements and wiring, etc., an insulation underlayer a, Pt layer for a bottom electrode, a dielectric film and a Pt layer for a top electrode are shaped. A top electrode, capacitance insulation film and bottom electrode are formed by etching the Pt layer for the top electrode or the Pt layer for the bottom electrode using an etching gas contained a S component while composing a Pt and S compound. Alternatively the Pt and S compound can be composed first, and then the compound can be etched.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: February 20, 1996
    Assignee: Matsushita Electronics Corporation
    Inventors: Shoji Matsumoto, Hideo Nikou, Satoshi Nakagawa