Patents by Inventor Hideo Nishiuchi
Hideo Nishiuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230298155Abstract: In an embodiment, an information processing apparatus relating to soldering of a component onto a substrate is provided. The information processing apparatus includes a determination unit determining, using a machine learning model that outputs an inspection result of a post-reflow inspection from an input of image data based on one or more pre-reflow images, whether or not defectiveness will occur in the post-reflow inspection from the image data based on the pre-reflow images acquired in real time.Type: ApplicationFiled: March 14, 2023Publication date: September 21, 2023Inventor: Hideo Nishiuchi
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Patent number: 11402427Abstract: According to one embodiment, an information processing system includes a memory, an inputter, and a processor. The memory stores correlation information including a specification item group, an element item group, and a risk item group. The specification item group includes specification items. The element item group includes element items. The risk item group includes risk items. One of the specification items to be modified is selected by a first operation input to the inputter. One of the element items is selected by a second operation input to the inputter. When the first operation is input, the processor refers to the correlation information and extracts at least one of the element items having a correlation with the one of the specification items. The processor extracts at least one of the risk items having a correlation with one element item of the at least one of the element items selected.Type: GrantFiled: June 20, 2018Date of Patent: August 2, 2022Assignee: Kabushiki Kaisha ToshibaInventors: Michinobu Inoue, Hideo Nishiuchi
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Publication number: 20190079127Abstract: According to one embodiment, an information processing system includes a memory, an inputter, and a processor. The memory stores correlation information including a specification item group, an element item group, and a risk item group. The specification item group includes specification items. The element item group includes element items. The risk item group includes risk items. One of the specification items to be modified is selected by a first operation input to the inputter. One of the element items is selected by a second operation input to the inputter. When the first operation is input, the processor refers to the correlation information and extracts at least one of the element items having a correlation with the one of the specification items. The processor extracts at least one of the risk items having a correlation with one element item of the at least one of the element items selected.Type: ApplicationFiled: June 20, 2018Publication date: March 14, 2019Applicant: Kabushiki Kaisha ToshibaInventors: Michinobu INOUE, Hideo NISHIUCHI
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Publication number: 20170256581Abstract: According to an embodiment, a detector pack comprises a first substrate and a second substrate. the first substrate includes a first surface and a second surface. the first substrate is provided with an X-ray detecting element in the first surface. the second substrate includes a third surface and a fourth surface. The second substrate is disposed in the second surface to face the third surface. The second substrate is provided with a data acquisition circuit in the third surface. The first substrate and the second substrate are formed as a stacked body. The data acquisition circuit is provided in the third surface not to come in contact with the second surface of the first substrate.Type: ApplicationFiled: March 1, 2017Publication date: September 7, 2017Applicant: Toshiba Medical Systems CorporationInventors: Toshiya NAKAYAMA, Hideo NISHIUCHI, Mayumi SO, Satoru ASAGIRI
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Publication number: 20160258610Abstract: According to one embodiment, an illuminating device includes a light source, a reflector, and a heat transfer member. The light source includes a light emitting element. The reflector is provided to surround the light source. The heat transfer member is provided outside the reflector and thermally bonded to the reflector.Type: ApplicationFiled: February 10, 2016Publication date: September 8, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Kakeru YAMAGUCHI, Hideo NISHIUCHI
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Patent number: 9171882Abstract: According to one embodiment, a semiconductor light emitting device includes a plurality of chips, a first insulating layer provided between the chips, one p-side external terminal, and one n-side external terminal. Each of the chips includes a semiconductor layer, a p-side electrode, and an n-side electrode. Each of the chips is separated from each other. The one p-side external terminal is provided corresponding to one chip on the second face side. The p-side external terminal is electrically connected to the p-side electrode. The one n-side external terminal is provided corresponding to one chip on the second face side. The n-side external terminal is electrically connected to the n-side electrode.Type: GrantFiled: February 10, 2014Date of Patent: October 27, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yosuke Akimoto, Yoshiaki Sugizaki, Akihiro Kojima, Kazuhito Higuchi, Hideo Nishiuchi, Susumu Obata
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Patent number: 9147673Abstract: According to one embodiment, a semiconductor power converter includes first and second electrical conductors opposed to each other, first and second semiconductor elements joined to a first joint surface of the first electrical conductor, first and second convex electrical conductors joined to the first and second semiconductor elements, a junction joined to the first and second convex electrical conductors and a second joint surface of the second electrical conductor, power terminals, signal terminals, and an envelope sealing the constituent members. The envelope includes a flat bottom surface which extends perpendicular to the semiconductor elements and in which first and second bottom surfaces of the electrical conductors are exposed.Type: GrantFiled: September 12, 2013Date of Patent: September 29, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hideo Nishiuchi, Kazuhiro Ueda, Takayuki Masunaga, Naotake Watanabe, Yoshiyuki Shimizu, Takashi Togasaki, Koji Maruno
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Publication number: 20150270203Abstract: According to one embodiment, a first semiconductor element has a first electrode connected to the first conductor, a second electrode connected to the second conductor, and a control electrode connected to a first signal terminal. A second semiconductor element has a first electrode connected to the first conductor, and a second electrode connected to the second conductor. A third semiconductor element has a first electrode connected to the third conductor, a second electrode connected to the fourth conductor, and a control electrode connected to a second signal terminal. A fourth semiconductor element has a first electrode connected to the third conductor, and a second electrode connected to the fourth conductor.Type: ApplicationFiled: March 2, 2015Publication date: September 24, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Hideo NISHIUCHI, Takashi TOGASAKI, Takayuki TAJIMA
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Patent number: 8987762Abstract: According to one embodiment, a light-emitting unit which emits light, a wavelength conversion unit which includes a phosphor and which is provided on a main surface of the light-emitting unit, and a transparent resin which is provided on top of the wavelength conversion unit, are prepared. The transparent resin has a greater modulus of elasticity and/or a higher Shore hardness than the wavelength conversion unit.Type: GrantFiled: September 7, 2012Date of Patent: March 24, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Toshiya Nakayama, Kazuhito Higuchi, Hiroshi Koizumi, Hideo Nishiuchi, Susumu Obata, Akiya Kimura, Yoshiaki Sugizaki, Akihiro Kojima, Yosuke Akimoto
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Patent number: 8956017Abstract: A lighting apparatus includes a case, a power source unit, and a light emitting unit. The case has a side portion provided around a first axis parallel to a direction from the power source unit toward the light emitting unit. The side portion has a first portion and a second portion disposed around a central axis parallel to the first axis. The first portion has a long distance to the central axis. The second portion has a short distance to the central axis. An end portion of an inner surface of the second portion is configured to have at least one selected from a portion perpendicular to the central axis and a portion has a recessed configuration with respect to the central axis when the inner surface is cut by a cross-section perpendicular to the central axis.Type: GrantFiled: February 27, 2012Date of Patent: February 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kumiko Ioka, Michinobu Inoue, Hideo Nishiuchi, Kazuki Tateyama, Koki Moriya
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Patent number: 8872327Abstract: According to one embodiment, a semiconductor device includes a first electrical conductor, a second electrical conductor, first and second semiconductors between the first and second electrical conductors, a first power terminal, a second power terminal, a signal terminal, and an insulator which covers the components. The insulator includes a flat bottom surface in which the first and second electrical conductors are exposed, a ceiling surface, a first end surface, and a second end surface. The power terminals and the signal terminal extend outwardly from the first and second end surfaces, and the ceiling surface, respectively. The first end surface, the ceiling surface, and the second end surface are formed with a parting line.Type: GrantFiled: September 12, 2013Date of Patent: October 28, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Masunaga, Kazuhiro Ueda, Naotake Watanabe, Yoshiyuki Shimizu, Hideo Nishiuchi, Takashi Togasaki, Satoshi Sayama
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Publication number: 20140175471Abstract: According to one embodiment, a semiconductor light emitting device includes a plurality of chips, a first insulating layer provided between the chips, one p-side external terminal, and one n-side external terminal. Each of the chips includes a semiconductor layer, a p-side electrode, and an n-side electrode. Each of the chips is separated from each other. The one p-side external terminal is provided corresponding to one chip on the second face side. The p-side external terminal is electrically connected to the p-side electrode. The one n-side external terminal is provided corresponding to one chip on the second face side. The n-side external terminal is electrically connected to the n-side electrode.Type: ApplicationFiled: February 10, 2014Publication date: June 26, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Yosuke AKIMOTO, Yoshiaki Sugizaki, Akihiro Kojima, Kazuhito Higuchi, Hideo Nishiuchi, Susumu Obata
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Publication number: 20140124909Abstract: According to one embodiment, a semiconductor device includes a first electrical conductor, a second electrical conductor, first and second semiconductors between the first and second electrical conductors, a first power terminal, a second power terminal, a signal terminal, and an insulator which covers the components. The insulator includes a flat bottom surface in which the first and second electrical conductors are exposed, a ceiling surface, a first end surface, and a second end surface. The power terminals and the signal terminal extend outwardly from the first and second end surfaces, and the ceiling surface, respectively. The first end surface, the ceiling surface, and the second end surface are formed with a parting line.Type: ApplicationFiled: September 12, 2013Publication date: May 8, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Takayuki Masunaga, Kazuhiro Ueda, Naotake Watanabe, Yoshiyuki Shimizu, Hideo Nishiuchi, Takashi Togasaki, Satoshi Sayama
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Publication number: 20140117526Abstract: According to one embodiment, a semiconductor power converter includes first and second electrical conductors opposed to each other, first and second semiconductor elements joined to a first joint surface of the first electrical conductor, first and second convex electrical conductors joined to the first and second semiconductor elements, a junction joined to the first and second convex electrical conductors and a second joint surface of the second electrical conductor, power terminals, signal terminals, and an envelope sealing the constituent members. The envelope includes a flat bottom surface which extends perpendicular to the semiconductor elements and in which first and second bottom surfaces of the electrical conductors are exposed.Type: ApplicationFiled: September 12, 2013Publication date: May 1, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Hideo Nishiuchi, Kazuhiro Ueda, Takayuki Masunaga, Naotake Watanabe, Yoshiyuki Shimizu, Takashi Togasaki, Koji Maruno
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Patent number: 8643264Abstract: According to one embodiment, the illuminating device of the embodiment has a base part and multiple light emitting elements; the illuminating device includes a supporting part, which is arranged on one end of the base part, and which at least partially encloses an internal space. The supporting part also has an outer surface exposed to the ambient atmosphere. The multiple light emitting elements are disposed on the inner surface side of the supporting part so that at least light emitting surfaces of the light emitting elements are in contact with the supporting part.Type: GrantFiled: September 19, 2012Date of Patent: February 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Hideo Nishiuchi, Izuru Komatsu, Daigo Suzuki, Kazuki Tateyama
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Patent number: 8614455Abstract: According to an embodiment, a semiconductor light emitting device includes a stacked body, first and second electrodes, first and second interconnections, first and second pillars and a first insulating layer. The stacked body includes first and second semiconductor layers and a light emitting layer. The first and second electrodes are connected to the first and second semiconductor layers respectively. The first and second interconnections are connected to the first and second electrode respectively. The first and second pillars are connected to the first and second interconnections respectively. The first insulating layer is provided on the interconnections and the pillars. The first and second pillars have first and second monitor pads exposed in a surface of the first insulating layer. The first and second interconnections have first and second bonding pads exposed in a side face connected with the surface of the first insulating layer.Type: GrantFiled: March 20, 2012Date of Patent: December 24, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Susumu Obata, Kazuhito Higuchi, Hideo Nishiuchi, Akiya Kimura, Toshiya Nakayama, Yoshiaki Sugizaki, Akihiro Kojima, Yosuke Akimoto
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Patent number: 8569787Abstract: According to one embodiment, a light source apparatus includes a semiconductor light emitting device, a mounting substrate, first and second connection members. The semiconductor light emitting device includes a light emitting unit, first and second conductive members, a sealing member, and an optical layer. The mounting substrate includes a base body, first and second substrate electrodes. The connection member electrically connects the conductive member to the substrate electrode. The conductive member is electrically connected to the light emitting unit electrode and includes first and second columnar portions provided on the second major surface. The sealing member covers side surfaces of the first and the second conductive members. The optical layer is provided on the first major surface of the semiconductor stacked body and includes a wavelength conversion unit. A surface area of the second substrate electrode is not less than 100 times a cross-sectional area of the second columnar portion.Type: GrantFiled: June 7, 2011Date of Patent: October 29, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hideo Nishiuchi, Kazuhito Higuchi, Susumu Obata, Toshiya Nakayama
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Publication number: 20130082294Abstract: According to one embodiment, a light-emitting unit which emits light, a wavelength conversion unit which includes a phosphor and which is provided on a main surface of the light-emitting unit, and a transparent resin which is provided on top of the wavelength conversion unit, are prepared. The transparent resin has a greater modulus of elasticity and/or a higher Shore hardness than the wavelength conversion unit.Type: ApplicationFiled: September 7, 2012Publication date: April 4, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Toshiya NAKAYAMA, Kazuhito HIGUCHI, Hiroshi KOIZUMI, Hideo NISHIUCHI, Susumu OBATA, Akiya KIMURA, Yoshiaki SUGIZAKI, Akihiro KOJIMA, Yosuke AKIMOTO
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Publication number: 20130069102Abstract: A semiconductor light-emitting device includes a laminated body that is configured to emit light from a main surface thereof, first and second electrodes, each disposed on a surface of the laminated body that is opposite the main surface, a first terminal that is electrically coupled to the first electrode, has a concave edge but not a convex edge, and has at most three exposed sides, and a second terminal that is electrically coupled to the second electrode, has a concave edge but not a convex edge, and has at most three exposed sides.Type: ApplicationFiled: September 7, 2012Publication date: March 21, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akiya KIMURA, Kazuhito Higuchi, Hideo Nishiuchi, Susumu Obata, Toshiya Nakayama, Yoshiaki Sugizaki, Akihiro Kojima, Yosuke Akimoto
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Patent number: 8378479Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating maType: GrantFiled: July 21, 2011Date of Patent: February 19, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Akira Tojo, Tomoyuki Kitani, Kazuhito Higuchi, Masako Fukumitsu, Tomohiro Iguchi, Hideo Nishiuchi, Kyoto Kato