Patents by Inventor Hideo Tamama

Hideo Tamama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11812041
    Abstract: A method for motion estimation is provided that includes determining a first motion vector for a first child coding unit (CU) of a parent CU and a second motion vector for a second child CU of the parent CU, wherein the first child CU, the second child CU, and the parent CU are in a CU hierarchy, wherein the first and second child CUs are smallest size CUs in the CU hierarchy, and wherein a first motion search type is used to determine the first motion vector and the second motion vector, selecting the first and second motion vectors as candidate predictors for the parent CU, selecting a predictor for a prediction unit (PU) of the first parent CU from the candidate predictors, and refining the predictor using a second motion search type to determine a motion vector for the PU.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: November 7, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Hyung Joon Kim, Minhua Zhou, Akira Osamoto, Hideo Tamama
  • Publication number: 20230232022
    Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.
    Type: Application
    Filed: March 20, 2023
    Publication date: July 20, 2023
    Inventors: Mihir Narendra Mody, Niraj Nandan, Hideo Tamama
  • Publication number: 20230199201
    Abstract: A method for coding unit partitioning in a video encoder is provided that includes performing intra-prediction on each permitted coding unit (CU) in a CU hierarchy of a largest coding unit (LCU) to determine an intra-prediction coding cost for each permitted CU, storing the intra-prediction coding cost for each intra-predicted CU in memory, and performing inter-prediction, prediction mode selection, and CU partition selection on each permitted CU in the CU hierarchy to determine a CU partitioning for encoding the LCU, wherein the stored intra-prediction coding costs for the CUs are used.
    Type: Application
    Filed: February 19, 2023
    Publication date: June 22, 2023
    Inventors: Hyung Joon Kim, Minhua Zhou, Akira Osamoto, Hideo Tamama
  • Patent number: 11611764
    Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: March 21, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Mihir Narendra Mody, Niraj Nandan, Hideo Tamama
  • Patent number: 11589060
    Abstract: A method for coding unit partitioning in a video encoder is provided that includes performing intra-prediction on each permitted coding unit (CU) in a CU hierarchy of a largest coding unit (LCU) to determine an intra-prediction coding cost for each permitted CU, storing the intra-prediction coding cost for each intra-predicted CU in memory, and performing inter-prediction, prediction mode selection, and CU partition selection on each permitted CU in the CU hierarchy to determine a CU partitioning for encoding the LCU, wherein the stored intra-prediction coding costs for the CUs are used.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: February 21, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hyung Joon Kim, Minhua Zhou, Akira Osamoto, Hideo Tamama
  • Patent number: 11580026
    Abstract: In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The first control unit may be configured to obtain, from the second control unit, a first memory address associated with a data reading process of the second processing unit, receive a write request from the first processing unit, the read request having an associated second memory address, and write data into the memory region based on the write request in response to a determination that the second memory address falls outside of the guarded reading region.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: February 14, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Vlad Fruchter, Richard Lawrence Greene, Hideo Tamama
  • Publication number: 20230044573
    Abstract: In one embodiment, one or more control units may store a position tracker associated with a first window of memory blocks and allow a first processing unit to write data within the first window. The control units may receive, from a second processing unit, a request for reading data with a memory-reading address, compare the memory-reading address to a first starting address of the first window, and prevent the second processing unit from reading the data when the memory-reading address is greater than or equal to the first starting address of the first window. The control units may store, when the data writing process is complete, an updated position tracker of a second window of memory blocks and allow the second processing unit to read the data based on a determination that the memory-reading address is less than a second starting address of the second window.
    Type: Application
    Filed: October 3, 2022
    Publication date: February 9, 2023
    Inventors: Vlad Fruchter, Richard Lawrence Greene, Hideo Tamama
  • Patent number: 11481323
    Abstract: In one embodiment, one or more control units may store a position tracker associated with a first window of memory blocks and allow a first processing unit to write data within the first window. The control units may receive, from a second processing unit, a request for reading data with a memory-reading address, compare the memory-reading address to a first starting address of the first window, and prevent the second processing unit from reading the data when the memory-reading address is greater than or equal to the first starting address of the first window. The control units may store, when the data writing process is complete, an updated position tracker of a second window of memory blocks and allow the second processing unit to read the data based on a determination that the memory-reading address is less than a second starting address of the second window.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: October 25, 2022
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Vlad Fruchter, Richard Lawrence Greene, Hideo Tamama
  • Patent number: 11430141
    Abstract: This disclosure describes efficient communication of surface texture data between system on a chip (SOC) integrated circuits. An example system includes a first integrated circuit, and at least one second integrated circuit communicatively coupled to the first integrated circuit by a communication interface. The first integrated circuit, upon determining that surface texture data of a frame to be rendered for display by the second SoC integrated circuit is to be updated, (a) transmits the surface texture data in one or more update packets to the second integrated circuit using the communication interface, and (b) transmits a command to the second integrated circuit indicating that the surface texture data of the frame has been updated using the communication interface.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: August 30, 2022
    Assignee: FACEBOOK TECHNOLOGIES, LLC
    Inventors: Hideo Tamama, Alok Kumar Mathur, Steve John Clohset
  • Publication number: 20220197812
    Abstract: In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The first control unit may be configured to obtain, from the second control unit, a first memory address associated with a data reading process of the second processing unit, receive a write request from the first processing unit, the read request having an associated second memory address, and write data into the memory region based on the write request in response to a determination that the second memory address falls outside of the guarded reading region.
    Type: Application
    Filed: January 18, 2022
    Publication date: June 23, 2022
    Inventors: Vlad Fruchter, Richard Lawrence Greene, Hideo Tamama
  • Publication number: 20220116604
    Abstract: A method for motion estimation is provided that includes determining a first motion vector for a first child coding unit (CU) of a parent CU and a second motion vector for a second child CU of the parent CU, wherein the first child CU, the second child CU, and the parent CU are in a CU hierarchy, wherein the first and second child CUs are smallest size CUs in the CU hierarchy, and wherein a first motion search type is used to determine the first motion vector and the second motion vector, selecting the first and second motion vectors as candidate predictors for the parent CU, selecting a predictor for a prediction unit (PU) of the first parent CU from the candidate predictors, and refining the predictor using a second motion search type to determine a motion vector for the PU.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 14, 2022
    Inventors: Hyung Joon Kim, Minhua Zhou, Akira Osamoto, Hideo Tamama
  • Publication number: 20220084294
    Abstract: One embodiment is directed to controlling a user device based on an interpreted user intention. Another embodiment is directed to generating a three-dimensional first-resolution digital map of a geographic area in real world based on second-resolution observations on the geographic area using a machine-learning model, where the first resolution is higher than the second resolution. Another embodiment is directed to estimating a location and/or a pose of a camera with images captured by the camera and data from Inertial Measurement Unit (IMU) sensors. Another embodiment is directed to causing the content of an app running on a first device to be rendered by and displayed on a second device. Yet another embodiment is directed to an augmented reality device comprising a pair of glasses and a hat.
    Type: Application
    Filed: September 14, 2021
    Publication date: March 17, 2022
    Inventors: Hao Chen, Luc Oth, Christian Forster, Alejo Concha Belenguer, Jesús Briales, Hideo Tamama, Juan Manuel Martinez
  • Patent number: 11269777
    Abstract: In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The second control unit may be configured to obtain, from the first control unit, a first memory address associated with a data writing process of the first processing unit, receive a read request from the second processing unit, the read request having an associated second memory address, and delay execution of the read request based on a comparison of the first memory address and the second memory address.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: March 8, 2022
    Assignee: Facebook Technologies, LLC.
    Inventors: Vlad Fruchter, Richard Lawrence Greene, Hideo Tamama
  • Patent number: 11245912
    Abstract: A method for motion estimation is provided that includes determining a first motion vector for a first child coding unit (CU) of a parent CU and a second motion vector for a second child CU of the parent CU, wherein the first child CU, the second child CU, and the parent CU are in a CU hierarchy, wherein the first and second child CUs are smallest size CUs in the CU hierarchy, and wherein a first motion search type is used to determine the first motion vector and the second motion vector, selecting the first and second motion vectors as candidate predictors for the parent CU, selecting a predictor for a prediction unit (PU) of the first parent CU from the candidate predictors, and refining the predictor using a second motion search type to determine a motion vector for the PU.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: February 8, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hyung Joon Kim, Minhua Zhou, Akira Osamoto, Hideo Tamama
  • Publication number: 20210281862
    Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.
    Type: Application
    Filed: May 26, 2021
    Publication date: September 9, 2021
    Inventors: Mihir Narendra Mody, Niraj Nandan, Hideo Tamama
  • Patent number: 11070819
    Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: July 20, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mihir Narendra Mody, Niraj Nandan, Hideo Tamama
  • Publication number: 20210195224
    Abstract: A method for coding unit partitioning in a video encoder is provided that includes performing intra-prediction on each permitted coding unit (CU) in a CU hierarchy of a largest coding unit (LCU) to determine an intra-prediction coding cost for each permitted CU, storing the intra-prediction coding cost for each intra-predicted CU in memory, and performing inter-prediction, prediction mode selection, and CU partition selection on each permitted CU in the CU hierarchy to determine a CU partitioning for encoding the LCU, wherein the stored intra-prediction coding costs for the CUs are used.
    Type: Application
    Filed: March 5, 2021
    Publication date: June 24, 2021
    Inventors: Hyung Joon Kim, Minhua Zhou, Akira Osamoto, Hideo Tamama
  • Patent number: 11044485
    Abstract: A method for coding unit partitioning in a video encoder is provided that includes performing intra-prediction on each permitted coding unit (CU) in a CU hierarchy of a largest coding unit (LCU) to determine an intra-prediction coding cost for each permitted CU, storing the intra-prediction coding cost for each intra-predicted CU in memory, and performing inter-prediction, prediction mode selection, and CU partition selection on each permitted CU in the CU hierarchy to determine a CU partitioning for encoding the LCU, wherein the stored intra-prediction coding costs for the CUs are used.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: June 22, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hyung Joon Kim, Minhua Zhou, Akira Osamoto, Hideo Tamama
  • Publication number: 20210133991
    Abstract: This disclosure describes efficient communication of surface texture data between system on a chip (SOC) integrated circuits. An example system includes a first integrated circuit, and at least one second integrated circuit communicatively coupled to the first integrated circuit by a communication interface. The first integrated circuit, upon determining that surface texture data of a frame to be rendered for display by the second SoC integrated circuit is to be updated, (a) transmits the surface texture data in one or more update packets to the second integrated circuit using the communication interface, and (b) transmits a command to the second integrated circuit indicating that the surface texture data of the frame has been updated using the communication interface.
    Type: Application
    Filed: January 14, 2020
    Publication date: May 6, 2021
    Inventors: Hideo Tamama, Alok Kumar Mathur, Steve John Clohset
  • Publication number: 20210089458
    Abstract: In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The second control unit may be configured to obtain, from the first control unit, a first memory address associated with a data writing process of the first processing unit, receive a read request from the second processing unit, the read request having an associated second memory address, and delay execution of the read request based on a comparison of the first memory address and the second memory address.
    Type: Application
    Filed: September 25, 2019
    Publication date: March 25, 2021
    Inventors: Vlad Fruchter, Richard Lawrence Greene, Hideo Tamama