Patents by Inventor Hideo Tsurufusa

Hideo Tsurufusa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100245671
    Abstract: According to one embodiment, an MPEG noise reduction processing unit which performs a process of reducing a mosquito noise to a received video signal can be controlled in a setting state corresponding to a desired item selected on the setting screen in which the plural items to be set are displayed as an option.
    Type: Application
    Filed: June 10, 2010
    Publication date: September 30, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Muto, Hideo Tsurufusa
  • Patent number: 7755702
    Abstract: According to one embodiment, an MPEG noise reduction processing unit which performs a process of reducing a mosquito noise to a received video signal can be controlled in a setting state corresponding to a desired item selected on the setting screen in which the plural items to be set are displayed as an option.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: July 13, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Muto, Hideo Tsurufusa
  • Patent number: 7626638
    Abstract: According to one embodiment, an input analog video signal is digitized, and an OSD signal to which a second scaling process is performed is added to the digital video signal to which a first scaling process is performed. At this point, display modes of the digital video signal and the OSD signal are changed by causing pieces of scaling data, supplied for the first and second scaling processes, to be variable based on a predetermined operation.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: December 1, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kota Mitsuya, Hideo Tsurufusa
  • Patent number: 7312998
    Abstract: According to one embodiment, a heat radiating apparatus comprises a shielding case having holding panels thereof arranged at locations substantially opposite to a circuit component to extend from a flat panel of the shielding case, which extends substantially parallel to a circuit board, towards the circuit board so as to cover the surface of the circuit board on which a circuit component is mounted. The head radiating apparatus further comprises a heat sink attached to the holding panels of the shielding case for coming into direct contact with the heat conductive sheet on the circuit component when the circuit board is covered with the shielding case.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: December 25, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Kamemoto, Hideo Tsurufusa, Takehiko Numata
  • Publication number: 20060215056
    Abstract: According to one embodiment, an input analog video signal is digitized, and an OSD signal to which a second scaling process is performed is added to the digital video signal to which a first scaling process is performed. At this point, display modes of the digital video signal and the OSD signal are changed by causing pieces of scaling data, supplied for the first and second scaling processes, to be variable based on a predetermined operation.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 28, 2006
    Inventors: Kota Mitsuya, Hideo Tsurufusa
  • Publication number: 20060197875
    Abstract: According to one embodiment, an MPEG noise reduction processing unit which performs a process of reducing a mosquito noise to a received video signal can be controlled in a setting state corresponding to a desired item selected on the setting screen in which the plural items to be set are displayed as an option.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 7, 2006
    Inventors: Yasuhiko Muto, Hideo Tsurufusa
  • Publication number: 20060197874
    Abstract: According to one embodiment, an input analog video signal is digitized, and an OSD signal to which a second scaling process is performed is added to the digital video signal to which a first scaling process is performed. At this point, scaling data corresponding to the number of pixels of a panel in which the OSD signal is displayed is supplied in order to perform the second scaling process.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 7, 2006
    Inventors: Takuji Matsuda, Hideo Tsurufusa
  • Publication number: 20060197873
    Abstract: According to one embodiment, when a digital video signal is inputted, a decoding process is performed to the digital video signal to add a digitized OSD signal, a first scaling process is performed to the digital video signal, and the digital video signal is outputted. When an analog video signal is inputted, the analog video signal is digitized to perform the first scaling process, and the OSD signal to which a second scaling process is performed is added to the digitized video signal. The second scaling process is lower than the first scaling process in quality.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 7, 2006
    Inventors: Munehiro Terada, Hideo Tsurufusa
  • Publication number: 20060187643
    Abstract: According to one embodiment, fixing plates are formed to a shield case which covers a circuit board including a circuit component. When a heat sink, which has bent heat dissipation plates and can be accommodated in a shield case, is attached to the fixing plates and the surface of the circuit board is covered by the shield case, the heat sink comes into contact with the heat conduction sheet attached to the circuit component.
    Type: Application
    Filed: February 7, 2006
    Publication date: August 24, 2006
    Inventor: Hideo Tsurufusa
  • Publication number: 20060176672
    Abstract: According to one embodiment, a heat radiating apparatus comprises a shielding case having holding panels thereof arranged at locations substantially opposite to a circuit component to extend from a flat panel of the shielding case, which extends substantially parallel to a circuit board, towards the circuit board so as to cover the surface of the circuit board on which a circuit component is mounted. The head radiating apparatus further comprises a heat sink attached to the holding panels of the shielding case for coming into direct contact with the heat conductive sheet on the circuit component when the circuit board is covered with the shielding case.
    Type: Application
    Filed: September 13, 2005
    Publication date: August 10, 2006
    Inventors: Kazuhiro Kamemoto, Hideo Tsurufusa, Takehiko Numata
  • Patent number: 6122020
    Abstract: A frame combining apparatus, having a plurality of decoding means for decoding frame data for each of a plurality of sub-frames through a decoding process opposite to a coding process when a plurality of coded data streams obtained by coding frame data of a frame divided into a plurality of sub-frames are input, a synchronizing means for generating external synchronizing data for defining output timings of decoded outputs from a plurality of decoding means, and a delaying means for generating more than one external synchronizing data delayed by a delay time corresponding to a plurality of sub-frames in response to the division of a frame and to give the external synchronizing data from the synchronizing means and external synchronizing data having a delay time corresponding to the divided sub-frames out of more than one delayed external synchronizing data to decoding means corresponding to the sub-frames, respectively.
    Type: Grant
    Filed: July 15, 1997
    Date of Patent: September 19, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shuji Abe, Akiyoshi Kato, Hideo Tsurufusa
  • Patent number: 5784526
    Abstract: When the low bit rate coding is effected in a recording system 1A, a signal is coded and recorded in a hierarchical structure. On the reproduction side, the type of a recorded signal (the low bit rate coded signal of the hierarchical structure, non-hierarchical structure, conventional analog recording or the like) is determined by a determination system 1E and the operation modes of a digital signal processing system 1G and an analog signal processing system 1F are set. The analog signal processing system processes a reproduced signal when it is analog signal. The digital signal processing system processes a reproduced signal when it is a digital signal or when a reproduced output from the analog signal processing system is processed in a digital manner.
    Type: Grant
    Filed: October 31, 1994
    Date of Patent: July 21, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Shimoda, Hideo Tsurufusa, Shinji Yoda, Kazuyoshi Fuse
  • Patent number: 5561608
    Abstract: When the low bit rate coding is effected in a recording system 1A, a signal is coded and recorded in a hierarchical structure. On the reproduction side, the type of a recorded signal (the low bit rate coded signal of the hierarchical structure, non-hierarchical structure, conventional analog recording or the like) is determined by a determination system 1E and the operation modes of a digital signal processing system 1G and an analog signal processing system 1F are set. The analog signal processing system processes a reproduced signal when it is analog signal. The digital signal processing system processes a reproduced signal when it is a digital signal or when a reproduced output from the analog signal processing system is processed in a digital manner.
    Type: Grant
    Filed: February 10, 1995
    Date of Patent: October 1, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Shimoda, Hideo Tsurufusa, Shinji Yoda, Kazuyoshi Fuse
  • Patent number: 5404248
    Abstract: A video data recording/reproducing apparatus is designed to effect the high density recording for low bit rate coded data, correct the error with high reliability and reproduce only the main signal. For this purpose, an error correction circuit corrects the error in a transmission path by use of a parity code added by a parity adding circuit on the transmission side. A switch selects one of outputs of the parity adding circuit and error correction circuit according to whether the parity code is contained in the transmission data or not. A recording/reproducing circuit causes an output of the switch to be recorded. At the time of reproducing operation, the error correction circuit corrects the error in the recording/reproducing operation by use of the parity code contained in the reproduced signal.
    Type: Grant
    Filed: July 13, 1994
    Date of Patent: April 4, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Shimoda, Yoshihisa Sakazaki, Hideo Tsurufusa, Minoru Yoneda, Takao Inoh, Teruo Itami
  • Patent number: 5394249
    Abstract: When the low bit rate coding is effected in a recording system 1A, a signal is coded and recorded in a hierarchical structure. On the reproduction side, the type of a recorded signal (the low bit rate coded signal of the hierarchical structure, non-hierarchical structure, conventional analog recording or the like) is determined by a determination system 1E and the operation modes of a digital signal processing system 1G and an analog signal processing system 1F are set. The analog signal processing system processes a reproduced signal when it is analog signal. The digital signal processing system processes a reproduced signal when it is a digital signal or when a reproduced output from the analog signal processing system is processed in a digital manner.
    Type: Grant
    Filed: July 12, 1993
    Date of Patent: February 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Shimoda, Hideo Tsurufusa, Shinji Yoda, Kazuyoshi Fuse