Patents by Inventor Hideo Yabashi

Hideo Yabashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7855894
    Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: December 21, 2010
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20100226108
    Abstract: A printed circuit board including a core substrate including a first resin substrate, a second resin substrate having an opening and a third resin substrate in a multilayer manner while interposing bonding plates, insulating layers and conductive circuit layers alternately laminated on the core substrate, solder bumps formed on an outer surface of the printed circuit board, a first capacitor formed in the opening of the second resin substrate, a conductive pad formed on the first resin substrate and connected to an electrode of the first capacitor, a via hole formed in the first resin substrate and directly connected to the conductive pad and a conductive circuit on the core substrate, and a second capacitor mounted on a surface of the printed circuit board.
    Type: Application
    Filed: May 21, 2010
    Publication date: September 9, 2010
    Applicant: IBIDEN, CO., LTD.
    Inventors: Yasushi INAGAKI, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20100118502
    Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between an IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Application
    Filed: January 21, 2010
    Publication date: May 13, 2010
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasushi INAGAKI, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20100014261
    Abstract: A printed circuit board includes a core substrate having an opening portion, an electronic component provided in the opening portion of the core substrate and including a dielectric body, a first electrode formed over the dielectric body, and a second electrode formed over the dielectric body such that the dielectric body is interposed between the first electrode and the second electrode, and a resin filling a gap between the core substrate and the electronic component in the opening portion of the core substrate. The resin filling the gap includes a filler.
    Type: Application
    Filed: September 25, 2009
    Publication date: January 21, 2010
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasushi INAGAKI, Motoo ASAI, Dongdong WANG, Hideo YABASHI, Seiji SHIRAI
  • Publication number: 20080169120
    Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
    Type: Application
    Filed: July 16, 2007
    Publication date: July 17, 2008
    Applicant: IBIDEN, CO., LTD.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20080158841
    Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Application
    Filed: February 20, 2008
    Publication date: July 3, 2008
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasushi INAGAKI, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20080158838
    Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Application
    Filed: February 20, 2008
    Publication date: July 3, 2008
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasushi INAGAKI, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20080142255
    Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
    Type: Application
    Filed: February 19, 2008
    Publication date: June 19, 2008
    Applicant: IBIDEN, CO., LTD.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20080144298
    Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
    Type: Application
    Filed: February 19, 2008
    Publication date: June 19, 2008
    Applicant: IBIDEN, CO., LTD.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 7342803
    Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: March 11, 2008
    Assignee: IBIDEN Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20080055872
    Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Application
    Filed: October 30, 2007
    Publication date: March 6, 2008
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasushi INAGAKI, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 7307852
    Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: December 11, 2007
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20070258225
    Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
    Type: Application
    Filed: July 13, 2007
    Publication date: November 8, 2007
    Applicant: IBIDEN, CO., LTD.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20050157478
    Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Application
    Filed: February 23, 2005
    Publication date: July 21, 2005
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 6876554
    Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: April 5, 2005
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Publication number: 20040160751
    Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 19, 2004
    Applicant: IBIDEN Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 6724638
    Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makesit possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: April 20, 2004
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 6492255
    Abstract: A via 42 is formed by copper plating on a surface of an aluminum electrode pad 32 of a semiconductor chip 30. Since the via 42 having flexibility absorbs a stress generated due to a difference in thermal expansion between the semiconductor chip 30 and a substrate, the semiconductor chip 30 can be mounted onto the substrate 50 with high reliability and connection reliability of the semiconductor chip 30 can be enhanced.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: December 10, 2002
    Assignee: Ibiden Co., LTD
    Inventors: Ryo Enomoto, Hideo Yabashi, Tadashi Sugiyama, Kenzo Hatada
  • Publication number: 20010049187
    Abstract: A via 42 is formed by copper plating on a surface of an aluminum electrode pad 32 of a semiconductor chip 30. Since the via 42 having flexibility absorbs a stress generated due to a difference in thermal expansion between the semiconductor chip 30 and a substrate, the semiconductor chip 30 can be mounted onto the substrate 50 with high reliability and connection reliability of the semiconductor chip 30 can be enhanced.
    Type: Application
    Filed: March 30, 2001
    Publication date: December 6, 2001
    Applicant: IBIDEN, CO., LTD.
    Inventors: Ryo Enomoto, Hideo Yabashi, Tadashi Sugiyama, Kenzo Hatada