Patents by Inventor Hideo Yamagata

Hideo Yamagata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10553550
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: February 4, 2020
    Assignee: Sony Corporation
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Publication number: 20170069586
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Application
    Filed: November 21, 2016
    Publication date: March 9, 2017
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Patent number: 9537005
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: January 3, 2017
    Assignee: Sony Corporation
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Publication number: 20160293759
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Application
    Filed: June 6, 2016
    Publication date: October 6, 2016
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Patent number: 9379239
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: June 28, 2016
    Assignee: Sony Corporation
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Patent number: 9276104
    Abstract: A high-frequency semiconductor device, wherein on one surface of a semiconductor substrate, a first insulating layer, an undoped epitaxial polysilicon layer in a state of column crystal, a second insulating layer, and a semiconductor layer are formed in order from a side of the one surface, and a high-frequency transistor is formed in a location of the semiconductor layer facing the undoped epitaxial polysilicon layer with the second insulating layer in between.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: March 1, 2016
    Assignee: SONY CORPORATION
    Inventors: Hiroki Tsunemi, Hideo Yamagata, Kenji Nagai, Yuji Ibusuki
  • Publication number: 20150137238
    Abstract: A high-frequency semiconductor device, wherein on one surface of a semiconductor substrate, a first insulating layer, an undoped epitaxial polysilicon layer in a state of column crystal, a second insulating layer, and a semiconductor layer are formed in order from a side of the one surface, and a high-frequency transistor is formed in a location of the semiconductor layer facing the undoped epitaxial polysilicon layer with the second insulating layer in between.
    Type: Application
    Filed: January 30, 2013
    Publication date: May 21, 2015
    Applicant: SONY CORPORATION
    Inventors: Hiroki Tsunemi, Hideo Yamagata, Kenji Nagai, Yuji Ibusuki
  • Publication number: 20150130015
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Application
    Filed: January 26, 2015
    Publication date: May 14, 2015
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Patent number: 8987866
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: March 24, 2015
    Assignee: Sony Corporation
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Publication number: 20140124897
    Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.
    Type: Application
    Filed: October 3, 2013
    Publication date: May 8, 2014
    Applicant: SONY CORPORATION
    Inventors: Yoshikazu Motoyama, Hiroki Tsunemi, Hideo Yamagata
  • Publication number: 20120081638
    Abstract: A light sensing element includes a photodiode formed on a semiconductor substrate surface, and a laminated structure formed on the photodiode, wherein the laminated structure includes a first layer formed of a silicon oxide film, a second layer formed on the first layer and formed of a silicon nitride film, and a third layer formed on the second layer and formed of a polysilicon film.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 5, 2012
    Applicant: SONY CORPORATION
    Inventors: Hiroshi Yumoto, Shuji Yoneda, Yusuke Murakawa, Hideo Yamagata
  • Patent number: 7507642
    Abstract: In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: March 24, 2009
    Assignee: Sony Corporation
    Inventors: Hideo Yamagata, Takeyoshi Koumoto, Kenji Atsuumi, Yoichi Negoro, Tatsushiro Hirata, Takashi Noguchi
  • Patent number: 7417124
    Abstract: Polyclonal antibody specific for a phosphorylated linker region in Smad2 and/or Smad3.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: August 26, 2008
    Assignees: Zeria Pharmaceutical Co., Ltd., Kansai Medical University
    Inventors: Koichi Matsuzaki, Toshihito Seki, Masanori Matsushita, Yoshiya Tahashi, Fukiko Furukawa, Yasushi Sugano, Shigeo Mori, Hideo Yamagata, Katsunori Yoshida, Mikio Nishizawa, Junichi Fujisawa, Keiko Inoue, legal representative, Kyoichi Inoue
  • Publication number: 20070287268
    Abstract: In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer.
    Type: Application
    Filed: May 11, 2007
    Publication date: December 13, 2007
    Applicant: SONY CORPORATION
    Inventors: Hideo Yamagata, Takeyoshi Koumoto, Kenji Atsuumi, Yoichi Negoro, Tatsushiro Hirata, Takashi Noguchi
  • Patent number: 7303979
    Abstract: In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: December 4, 2007
    Assignee: Sony Corporation
    Inventors: Hideo Yamagata, Takeyoshi Koumoto, Kenji Atsuumi, Yoichi Negoro, Tatsushiro Hirata, Takashi Noguchi
  • Patent number: 7157344
    Abstract: In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: January 2, 2007
    Assignee: Sony Corporation
    Inventors: Hideo Yamagata, Takeyoshi Koumoto, Kenji Atsuumi, Yoichi Negoro, Tatsushiro Hirata, Takashi Noguchi
  • Publication number: 20060163625
    Abstract: The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer.
    Type: Application
    Filed: January 26, 2006
    Publication date: July 27, 2006
    Inventors: Takeyoshi Koumoto, Hideo Yamagata
  • Patent number: 7060582
    Abstract: The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: June 13, 2006
    Assignee: Sony Corporation
    Inventors: Takeyoshi Koumoto, Hideo Yamagata
  • Publication number: 20050079559
    Abstract: Polyclonal antibody specific for a phosphorylated linker region in Smad2 and/or Smad3.
    Type: Application
    Filed: April 13, 2004
    Publication date: April 14, 2005
    Inventors: Koichi Matsuzaki, Toshihito Seki, Masanori Matsushita, Yoshiya Tahashi, Fukiko Furukawa, Yasushi Sugano, Shigeo Mori, Hideo Yamagata, Katsunori Yoshida, Mikio Nishizawa, Junichi Fujisawa, Kyoichi Inoue, Keiko Inoue
  • Publication number: 20040198010
    Abstract: The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer.
    Type: Application
    Filed: December 5, 2003
    Publication date: October 7, 2004
    Inventors: Takeyoshi Koumoto, Hideo Yamagata