Patents by Inventor Hideo Yamamoto

Hideo Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142292
    Abstract: An information processing device includes an acquisition device that acquires, as a first strength, a strength of a radio signal related to position information received at a position of a first height, and a first determination device that determines that the first height is a water level when an attenuation amount of the first strength with respect to a reference strength exceeds a predetermined value.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 2, 2024
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hideo SASAHARA, Yoshihiro YAMAMURA, Hidetoshi YAMAMOTO, Yuya OZAWA
  • Patent number: 11961699
    Abstract: A charged particle beam device which prevents an appearance of a shading contrast due to azimuth discrimination and obtains a clear magnetic domain contrast image with a high resolution and a high throughput. The charged particle beam device includes an electron beam source; a sample stage; an objective lens configured to focus electron beams on a sample; a detector that is mounted on a charged particle beam source side with respect to the objective lens and separately detects secondary electrons emitted in azimuth angle ranges of two or more different azimuths for the same observation region; an image processing and image management device including an image processing unit configured to perform synthesis after performing shading correction and contrast adjustment on an image obtained by detecting a first emission azimuth and an image obtained by detecting a second emission azimuth; an image database; and an image display unit.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: April 16, 2024
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Hideo Morishita, Teruo Kohashi, Hiroyuki Yamamoto, Junichi Katane
  • Patent number: 11954335
    Abstract: Reliability in a storage system can be easily and appropriately improved. In a computer system including a storage system configured to provide a plurality of instances in any one of a plurality of subzones divided by risk boundaries, a processor of the computer system is configured to make a storage controller that controls I/O processing for a volume based on a capacity pool provided by a plurality of storages redundant to the plurality of instances provided in the plurality of subzones.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: April 9, 2024
    Assignee: HITACHI, LTD.
    Inventors: Takaki Nakamura, Hideo Saito, Naruki Kurata, Takahiro Yamamoto
  • Publication number: 20220349152
    Abstract: Provided is a hydraulic piping clamp device for a construction machine, with which it is possible to easily assemble a plurality of clamp members used to fasten hydraulic piping. A fastener (5) includes a bracket (6) and a plurality of clamp members (7). Hydraulic hoses (4) are respectively held by the plurality of clamp members (7). Each clamp member (7) has a holding portion (71) for holding a hydraulic hose and an insertion hole into which a guide bar (65) can be inserted. The clamp members (7) are mounted on the bracket (6) by inserting the guide bar (65) into the insertion hole in the clamp members (7). When two adjacent clamp members move away from one another, a first engaging portion (73) of one clamp member engages with a second engaging portion (75) of the other clamp member.
    Type: Application
    Filed: March 19, 2020
    Publication date: November 3, 2022
    Applicant: KOBELCO CONSTRUCTION MACHINERY CO., LTD.
    Inventors: Hideyuki OKURA, Keiko MATSUO, Masataka KARASAWA, Hideo YAMAMOTO
  • Patent number: 10932539
    Abstract: When a user pushes an operating member to one side in a longitudinal direction of arms, holding of a holding member is released and the arms can be expanded and contracted, while when the user pushes the operating member to the other side in the longitudinal direction of the arms, locking of a locked body by an engaging and disengaging member is released, and a handle body can be pivoted around a pivoting center shaft with respect to a carry case body.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: March 2, 2021
    Assignee: DAIICHI KOSHO LTD.
    Inventor: Hideo Yamamoto
  • Publication number: 20190365071
    Abstract: When a user pushes an operating member to one side in a longitudinal direction of arms, holding of a holding member is released and the arms can be expanded and contracted, while when the user pushes the operating member to the other side in the longitudinal direction of the arms, locking of a locked body by an engaging and disengaging member is released, and a handle body can be pivoted around a pivoting center shaft with respect to a carry case body.
    Type: Application
    Filed: August 16, 2019
    Publication date: December 5, 2019
    Applicant: Daiichi Kosho Ltd.
    Inventor: Hideo YAMAMOTO
  • Patent number: 10426240
    Abstract: When a user pushes an operating member to one side in a longitudinal direction of arms, holding of a holding member is released and the arms can be expanded and contracted, while when the user pushes the operating member to the other side in the longitudinal direction of the arms, locking of a locked body by an engaging and disengaging member is released, and a handle body can be pivoted around a pivoting center shaft with respect to a carry case body.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: October 1, 2019
    Assignee: DAIICHI KOSHO LTD.
    Inventor: Hideo Yamamoto
  • Publication number: 20170332759
    Abstract: When a user pushes an operating member to one side in a longitudinal direction of arms, holding of a holding member is released and the arms can be expanded and contracted, while when the user pushes the operating member to the other side in the longitudinal direction of the arms, locking of a locked body by an engaging and disengaging member is released, and a handle body can be pivoted around a pivoting center shaft with respect to a carry case body.
    Type: Application
    Filed: November 9, 2016
    Publication date: November 23, 2017
    Inventor: Hideo YAMAMOTO
  • Patent number: 9636731
    Abstract: A punch (2) and a pad (5) are opposed to each other such that a molded portion (3a) of a metal laminate film (3) to be processed is interposed between the punch (2) and the pad (5). An enclosed space (6, 7) is compressed to raise only the temperature of the molded portion (3a) while keeping the vicinity of the molded portion (3a) at a low temperature (S1, S2). After that, the enclosed space (6, 7) is moved with respect to the molded portion (3a) to perform first molding (S3) on the molded portion (3a), and then gas in the enclosed space (6) is released to perform second molding (S4) on the molded portion (3a) by means of the punch (2) and the pad (5).
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: May 2, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Hideo Yamamoto
  • Publication number: 20150181998
    Abstract: Provided is a carrying case including: a case body; a grip gripped when moving the case body; a supporting part having a distal end provided with the grip; and casters configured to roll in contact with a road when moving the case body, wherein the case body has a first sidewall, a second sidewall opposed to the first sidewall, and a frame wall extending in a thickness direction across edges of the first sidewall and the second sidewall, and the supporting part has a proximal end arranged on an outer surface of one of the first sidewall and the second sidewall pivotally about a shaft extending along the thickness direction, the carrying case further including: a holding and releasing mechanism configured to hold and release the proximal end about the shaft; and an operating part configured to operate the holding and releasing mechanism to hold and release the proximal end.
    Type: Application
    Filed: December 16, 2014
    Publication date: July 2, 2015
    Inventor: Hideo Yamamoto
  • Patent number: 8715883
    Abstract: There is provided a fuel cell power generation system in which power loss in a power line electrically connecting a stack and a power conversion circuit, thereby attaining high power generation efficiency. A reformer and the stack are disposed in a main body package. Stack output terminals 31 are provided in both ends in a stacking direction of the stack. A power conversion circuit is disposed in the main body package and arranged in the proximity to the stack. Power conversion circuit input terminals are provided on the power conversion circuit and arrayed in a direction parallel to the stacking direction of the stack. Stack output lines electrically connect the stack output terminals and the power conversion circuit input terminals.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: May 6, 2014
    Assignee: Panasonic Corporation
    Inventor: Hideo Yamamoto
  • Patent number: 8673518
    Abstract: There is provided a fuel cell power generation system in which power loss in a power line electrically connecting a stack and a power conversion circuit, thereby attaining high power generation efficiency. A reformer and the stack are disposed in a main body package. Stack output terminals 31 are provided in both ends in a stacking direction of the stack. A power conversion circuit is disposed in the main body package and arranged in the proximity to the stack. Power conversion circuit input terminals are provided on the power conversion circuit and arrayed in a direction parallel to the stacking direction of the stack. Stack output lines electrically connect the stack output terminals and the power conversion circuit input terminals.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: March 18, 2014
    Assignee: Panasonic Corporation
    Inventor: Hideo Yamamoto
  • Patent number: 8609493
    Abstract: A method of fabricating a semiconductor device according to the present invention includes forming a first trench and a second trench by etching the first trench further, in an epitaxial layer formed over a substrate, extending a width of the second trench, forming an oxidize film by oxidizing the extended second trench, and filling an electrode material in the first trench and the second trench including the oxidized film formed therein. The method of fabricating a semiconductor device according to the present invention enables to fabricate a semiconductor device that improves the withstand voltage between a drain and a source and reduce the on-resistance.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: December 17, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Hideo Yamamoto, Kei Takehara
  • Patent number: 8592896
    Abstract: A semiconductor device includes a semiconductor layer of a second conductive type, a first diffused region of a first conductive type formed in the semiconductor layer, a second diffused region of the second conductive type selectively formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode housed in the trench with a gate insulator intervening, a top surface of the gate electrode being lower than a top surface of the second diffused region, a first oxide film housed in the trench and formed over the gate electrode, a second oxide film housed in the trench and formed over the first oxide film, a third oxide film housed in the trench and formed over the second oxide film, and a source electrode formed over the third oxide film and electrically connecting to the first and second diffused regions.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: November 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshimitsu Murase, Kenya Kobayashi, Atsushi Kaneko, Hideo Yamamoto
  • Publication number: 20130243548
    Abstract: A punch (2) and a pad (5) are opposed to each other such that a molded portion (3a) of a metal laminate film (3) to be processed is interposed between the punch (2) and the pad (5). An enclosed space (6, 7) is compressed to raise only the temperature of the molded portion (3a) while keeping the vicinity of the molded portion (3a) at a low temperature (S1, S2). After that, the enclosed space (6, 7) is moved with respect to the molded portion (3a) to perform first molding (S3) on the molded portion (3a), and then gas in the enclosed space (6) is released to perform second molding (S4) on the molded portion (3a) by means of the punch (2) and the pad (5).
    Type: Application
    Filed: November 28, 2012
    Publication date: September 19, 2013
    Applicant: Panasonic Corporation
    Inventor: Hideo YAMAMOTO
  • Publication number: 20120295173
    Abstract: There is provided a fuel cell power generation system in which power loss in a power line electrically connecting a stack and a power conversion circuit, thereby attaining high power generation efficiency. A reformer and the stack are disposed in a main body package. Stack output terminals 31 are provided in both ends in a stacking direction of the stack. A power conversion circuit is disposed in the main body package and arranged in the proximity to the stack. Power conversion circuit input terminals are provided on the power conversion circuit and arrayed in a direction parallel to the stacking direction of the stack. Stack output lines electrically connect the stack output terminals and the power conversion circuit input terminals.
    Type: Application
    Filed: July 31, 2012
    Publication date: November 22, 2012
    Applicant: Panasonic Corporation
    Inventor: Hideo YAMAMOTO
  • Patent number: 8310005
    Abstract: A semiconductor device includes a semiconductor layer, a first diffused region formed in the semiconductor layer, a second diffused region formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode disposed in the trench, a top surface of the gate electrode being lower than a top surface of the semiconductor layer and sagging downwards in a center thereof, a non-doped silicate glass film disposed in the trench and formed over the gate electrode, a top surface of the silicate glass film sagging downwards in a center thereof, an oxide film disposed in the trench and formed over the non-doped silicate glass film, a top surface of the oxide film sagging downwards in a center, and a source electrode formed over the semiconductor layer so that the source electrode contacts the first and second diffusion regions, and the oxide film at the top surface thereof.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshimitsu Murase, Kenya Kobayashi, Hideo Yamamoto, Atsushi Kaneko
  • Publication number: 20120282745
    Abstract: A method of fabricating a semiconductor device according to the present invention includes forming a first trench and a second trench by etching the first trench further, in an epitaxial layer formed over a substrate, extending a width of the second trench, forming an oxidize film by oxidizing the extended second trench, and filling an electrode material in the first trench and the second trench including the oxidized film formed therein. The method of fabricating a semiconductor device according to the present invention enables to fabricate a semiconductor device that improves the withstand voltage between a drain and a source and reduce the on-resistance.
    Type: Application
    Filed: June 19, 2012
    Publication date: November 8, 2012
    Inventors: Hideo Yamamoto, Kei Takehara
  • Patent number: 8276824
    Abstract: A communication device including a receiving unit, a command processing unit, an updating unit, a transmitting unit, and a selector is provided. The receiving unit receives a transmitted command. The command processing unit performs command processing in response to the received command and generates a response containing a result of the command processing. The updating unit updates information held in one area of a memory currently disabled using the result of the command processing, wherein a first area and a second area form the memory for holding information indicating a current status. The transmitting unit transmits the generated response. The selector switches the one area currently disabled and holds the information that was updated using the result of the command processing into the enabled state and the other area currently enabled into the disabled state immediately after transmission of the response is completed.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: October 2, 2012
    Assignee: Sony Corporation
    Inventors: Hideo Yamamoto, Tadashi Morita
  • Patent number: 8222109
    Abstract: A method of fabricating a semiconductor device according to the present invention includes forming a first trench and a second trench by etching the first trench further, in an epitaxial layer formed over a substrate, extending a width of the second trench, forming an oxidize film by oxidizing the extended second trench, and filling an electrode material in the first trench and the second trench including the oxidized film formed therein. The method of fabricating a semiconductor device according to the present invention enables to fabricate a semiconductor device that improves the withstand voltage between a drain and a source and reduce the on-resistance.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: July 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hideo Yamamoto, Kei Takehara