Abstract: Disclosed herein is a method of improving residue and thermal characteristics of a semiconductor device. The method comprises the steps of a) depositing nickel and cobalt layers sequentially on a silicone substrate having a transistor formed thereon, b) depositing a capping layer on the cobalt layer, c) forming a silicide layer from the cobalt and nickel layers deposited on the silicone substrate by heat treatment, and d) wet etching to remove a residue. As the silicide layer is formed by additionally deposing the capping layer of titanium nitride on triple layers of silicone, cobalt and nickel, thermal stability for a thermal process performed when forming the silicide is ensured, and as resistance caused by an etchant is eliminated by the subsequent etching process, the residue is completely removed.

Abstract: Disclosed herein is a method of improving residue and thermal characteristics of a semiconductor device. The method comprises the steps of a) depositing nickel and cobalt layers sequentially on a silicone substrate having a transistor formed thereon, b) depositing a capping layer on the cobalt layer, c) forming a silicide layer from the cobalt and nickel layers deposited on the silicone substrate by heat treatment, and d) wet etching to remove a residue. As the silicide layer is formed by additionally deposing the capping layer of titanium nitride on triple layers of silicone, cobalt and nickel, thermal stability for a thermal process performed when forming the silicide is ensured, and as resistance caused by an etchant is eliminated by the subsequent etching process, the residue is completely removed.

Abstract: Disclosed herein is a method of manufacturing a semiconductor device. The method comprises the steps of a) depositing nickel and cobalt layers sequentially on a silicone substrate having a transistor formed thereon, b) forming a silicide layer from the nickel and cobalt layers deposited on the silicone substrate by a rapid thermal process, and c) annealing and wet-etching the semiconductor device obtained in the step b). As the double layers of nickel/cobalt are formed, a resistance difference between N-polysilicone and P-polysilicone is lowered, and thermal stability during a subsequent heat treatment process after forming the silicide is enhanced.

Abstract: An improved semiconductor device, and a corresponding fabrication method thereof, are provided that include a ground region defined in a semiconductor substrate. A hole is formed using a known electropolishing system to electropolish a portion of a bottom surface of the substrate which corresponds to the ground region. A metal layer is formed on the bottom surface of the substrate and in the hole. The metal layer serves as ground by being linked with a ground metal line formed on a substrate surface.

Abstract: The invention relates to a fabrication method of a semiconductor device having dual gates, and more particularly to a fabrication method of dual gates which respectively have a gate insulating film having a different thickness, which includes the steps of providing a semiconductor substrate having a first region and a second region; sequentially forming a first insulating film and an oxidizable film on the first region of the substrate; and forming a second insulating film on the second region of the substrate. Since, when forming the second insulating film, the oxidizable film becomes an oxide film, which oxide film is combined with the first insulating film, thus forming the first gate insulating film, the first gate insulating film is formed thicker than the second gate insulating film in accordance with a simplified oxidation process.

Abstract: The present invention relates to a method for manufacturing a semiconductor wafer having a SOI wafer-like structure which is prepared on a silicon substrate by electrochemical etching, and an active-driven liquid crystal display employing the semiconductor wafer as a pixel switching wafer. In accordance with the method for manufacturing the SOI-type semiconductor wafer, a wafer having a good electrical insulation property, low leakage current and small parasitic capacity, like a SOI wafer, can be prepared, by employing a silicon substrate which is cheaper than the SOI substrate.