Patents by Inventor Hideshi Abe

Hideshi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6750159
    Abstract: An object of the present invention is to provide a semiconductor apparatus and a method of manufacturing the same, in which dispersion of a threshold voltage Vth of a transistor at every transistor is reduced to remove generation of fixed charges in a gate insulation film and a surface level to stabilize the operation of the semiconductor apparatus. A semiconductor apparatus having a MIS transistor (1), wherein a gate electrode (4) of said MIS transistor (1), which mainly contributes to the operation of a circuit, is continuously formed to a position above a bypass film (8) made of an insulation film through which a leak current is able to easily flow as compared with a gate insulation film (7) of said MIS transistor (1) under the same voltage.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: June 15, 2004
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Publication number: 20030210580
    Abstract: A method for making a solid-state imaging device that can form a first P-type well region deep in a substrate without being affected by the heat applied during an epitaxial growth process is disclosed. The method includes a first step of preparing a substrate composite comprising an first substrate and a second substrate on the first substrate, a second step of implanting impurity ions from the surface of the second substrate at an energy exceeding 3 MeV so as to form a barrier layer, and a third step of forming a photosensor in the second substrate.
    Type: Application
    Filed: January 22, 2003
    Publication date: November 13, 2003
    Inventor: Hideshi Abe
  • Patent number: 6599772
    Abstract: A solid-state pickup element achieves both improvement in sensitivity and reduction of pixel size and a method thereof, includes a first conductive type semiconductor area, which is formed at least so as to include the inside of the semiconductor substrate upward of the overflow barrier area inside the semiconductor substrate, and a charge accumulating area at the position corresponding to the first conductive type semiconductor area of the light receptive sensor part in the epitaxial layer on the semiconductor substrate. An overflow barrier area is formed in the semiconductor substrate, and the first conductive type semiconductor area is formed on the surface, respectively, wherein an epitaxial layer is formed on the semiconductor substrate, and a charge accumulating area is formed at the position corresponding to the first conductive type semiconductor area on the surface side of the epitaxial layer, thereby producing a solid-state pickup element.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: July 29, 2003
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 6521920
    Abstract: A solid state image sensor is provided with a primary first-conductivity-type semiconductive region which serves as a charge storage region of a photo-sensing area and a secondary first-conductivity-type semiconductive region for enlarging a charge collecting region of the photo-sensing area.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: February 18, 2003
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 6436729
    Abstract: A process for producing a solid image pickup device is demanded that can enhance a photoelectric conversion region by forming an overflow barrier layer at a deep position and can prevents generation of radiation due to the use of resist as a mask. Upon producing a solid image pickup device having a vertical overflow drain structure, ion implantation is conducted on an entire of a silicon substrate without using a resist mask, so as to form an overflow barrier layer. It is also possible that a trench is formed in a peripheral part of the silicon substrate to surround a pixel region and to separate the overflow barrier layer into the pixel region and an outer peripheral part, and an impurity diffusion layer having a conductive type different from that of the overflow barrier layer is formed on an inner surface of the trench.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: August 20, 2002
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Publication number: 20010054726
    Abstract: The invention relates to a solid-state pickup element that can achieve both improvement in the sensitivity and reduction of pixel size and a method for producing the same, wherein a solid-state pickup element 1 is constructed, which includes a first conductive type semiconductor area 21, which is formed at least so as to include the inside of the semiconductor substrate 2 upward of the overflow barrier area 3 inside the semiconductor substrate 2, and a charge accumulating area 6 at the position corresponding to the first conductive type semiconductor area 21 of the light receptive sensor part 5 in the epitaxial layer 4 on the semiconductor substrate 2.
    Type: Application
    Filed: April 4, 2001
    Publication date: December 27, 2001
    Inventor: Hideshi Abe
  • Patent number: 6312969
    Abstract: A solid-state imaging sensor, a method for manufacturing the solid-state imaging sensor and an imaging device of which said solid state image sensor is designed to reduce unwanted light reflections, improve light focusing of light reflections from the substrate and oblique light constituents onto the sensor in order to allow further reduction in pixel size. Transfer electrodes in a line shape are arrayed at spaced intervals on a substrate, discrete sensors for photo-electric conversion are formed between the transfer electrode lines, a light-impervious film consisting of a first and second light-impervious films with an aperture positioned directly above a sensor is formed on the substrate and covers the transfer electrode to block any incident light other than the beam of light R from entering the sensor, and an on-chip lens for focusing the light R onto a sensor is formed above the light-impervious film.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: November 6, 2001
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Publication number: 20010029078
    Abstract: An object of the present invention is to provide a semiconductor apparatus and a method of manufacturing the same, in which dispersion of a threshold voltage Vth of a transistor at every transistor is reduced to remove generation of fixed charges in a gate insulation film and a surface level to stabilize the operation of the semiconductor apparatus. A semiconductor apparatus having a MIS transistor (1), wherein a gate electrode (4) of said MIS transistor (1), which mainly contributes to the operation of a circuit, is continuously formed to a position above a bypass film (8) made of an insulation film through which a leak current is able to easily flow as compared with a gate insulation film (7) of said MIS transistor (1) under the same voltage.
    Type: Application
    Filed: June 11, 2001
    Publication date: October 11, 2001
    Inventor: Hideshi Abe
  • Patent number: 6278154
    Abstract: An object of the present invention is to provide a semiconductor apparatus and a method of manufacturing the same, in which dispersion of a threshold voltage Vth of a transistor at every transistor is reduced to remove generation of fixed charges in a gate insulation film and a surface level to stabilize the operation of the semiconductor apparatus. A semiconductor apparatus having a MIS transistor (1), wherein a gate electrode (4) of said MIS transistor (1), which mainly contributes to the operation of a circuit, is continuously formed to a position above a bypass film (8) made of an insulation film through which a leak current is able to easily flow as compared with a gate insulation film (7) of said MIS transistor (1) under the same voltage.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: August 21, 2001
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Publication number: 20010006237
    Abstract: A solid state image sensor is provided with a primary first-conductivity-type semiconductive region which serves as a charge storage region of a photo-sensing area and a secondary first-conductivity-type semiconductive region for enlarging a charge collecting region of the photo-sensing area.
    Type: Application
    Filed: December 27, 2000
    Publication date: July 5, 2001
    Applicant: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 6252219
    Abstract: A solid-state imaging element is able to maximize a sensitivity relative to various kinds of light sources having different incident angles. In a solid-state imaging element (20), a maximum inclination angle (max of a curved surface (SL) of an interlayer lens (11) relative to a surface (SS) parallel to a surface of a substrate (2) is set to an angle near a critical angle (&thgr;c) of a total reflection.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: June 26, 2001
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 6246081
    Abstract: A solid-state imaging sensor, a method for manufacturing the solid-state imaging sensor and an imaging device of which said solid state image sensor is designed to reduce unwanted light reflections, improve light focusing of light reflections from the substrate and oblique light constituents onto the sensor in order to allow further reduction in pixel size. Transfer electrodes in a line shape are arrayed at spaced intervals on a substrate, discrete sensors for photo-electric conversion are formed between the transfer electrode lines, a light-impervious film consisting of a first and second light-impervious films with an aperture positioned directly above a sensor is formed on the substrate and covers the transfer electrode to block any incident light other than the beam of light R from entering the sensor, and an on-chip lens for focusing the light R onto a sensor is formed above the light-impervious film.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: June 12, 2001
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 5869352
    Abstract: In an amplifying type solid-state imaging device having a pixel MOS transistor, the occurrence of blooming can be suppressed and an amount of signal charges can be increased. A second conductivity-type overflow-barrier region (23) and a first conductivity-type semiconductor region (24) are sequentially formed on a first conductivity-type semiconductor substrate (22). A pixel MOS transistor (29) comprising a source region (27), a drain region (28) and a gate portion (26) is formed on the first conductivity-type semiconductor region (24), and a second conductivity-type channel stopper region (41) for signal charges accumulated in the first conductivity-type semiconductor region (24) of the gate portion (26) is formed within the first conductivity-type semiconductor region (24) formed just below the drain region (28).
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: February 9, 1999
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe, Kazuya Yonemoto, Takahisa Ueno, Junji Yamane
  • Patent number: 5808333
    Abstract: In an amplifying type solid-state imaging device having a pixel MOS transistor, the occurrence of blooming can be suppressed and an amount of signal charges can be increased. A second conductivity-type overflow-barrier region (23) and a first conductivity-type semiconductor region (24) are sequentially formed on a first conductivity-type semiconductor substrate (22). A pixel MOS transistor (29) comprising a source region (27), a drain region (28) and a gate portion (26) is formed on the first conductivity-type semiconductor region (24), and a second conductivity-type channel stopper region (41) for signal charges accumulated in the first conductivity-type semiconductor region (24) of the gate portion (26) is formed within the first conductivity-type semiconductor region (24) formed just below the drain region (28).
    Type: Grant
    Filed: October 2, 1996
    Date of Patent: September 15, 1998
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe, Kazuya Yonemoto, Takahisa Ueno, Junji Yamane
  • Patent number: 5581099
    Abstract: In a CCD solid state image sensing device in which a photosensitive section is constructed by a photodiode formed by a PN junction between a first P-type well region and an N-type impurity diffusion region formed on an N-type silicon substrate, the N-type impurity diffusion region is formed by the ion implantation of single substance of arsenic (As). According to this CCD solid state image sensing device, a bright flaw on an image sensing screen, which is one of the defects encountered with an image sensing screen, can be reduced. Also, the n-type impurity diffusion region constructing the PN Junction can be reduced in size and the CCD solid state image sensing device itself can be made compact in size. Further, a method of manufacturing a CCD solid state image sensing device also is provided.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: December 3, 1996
    Assignee: Sony Corporation
    Inventors: Takahisa Kusaka, Hideo Kanbe, Akio Izumi, Hideshi Abe, Masanori Ohashi, Atsushi Asai
  • Patent number: 5576570
    Abstract: Disclosed is a CMOS integrated circuit, in which a high voltage circuit with both positive and negative polarities and a large scale low voltage circuit are formed on the same chip. The high voltage circuit is composed of a CMOS circuit having an nMOS transistor formed on a p-type semiconducting substrate, and a pMOS transistor formed in an n-well formed on the p-type semiconducting substrate. The low voltage circuit is composed of a CMOS circuit having a pMOS transistor which is formed in an n-well formed on the p-type semiconducting substrate, and an nMOS transistor formed in a p-well formed in the n-well.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: November 19, 1996
    Assignee: Sony Corporation
    Inventors: Nobuhiko Ohsawa, Shinichi Ito, Hideshi Abe
  • Patent number: 5476808
    Abstract: In a CCD solid state image sensing device in which a photosensitive section is constructed by a photodiode formed by a PN junction between a first P-type well region and an N-type impurity diffusion region formed on an N-type silicon substrate, the N-type impurity diffusion region is formed by the ion implantation of single substance of arsenic (As). According to this CCD solid state image sensing device, a bright flaw on an image sensing screen, which is one of the defects encountered with an image sensing screen, can be reduced. Also, the n-type impurity diffusion region constructing the PN junction can be reduced in size and the CCD solid state image sensing device itself can be made compact in size. Further, a method of manufacturing a CCD solid state image sensing device also is provided.
    Type: Grant
    Filed: May 11, 1993
    Date of Patent: December 19, 1995
    Assignee: Sony Corporation
    Inventors: Takahisa Kusaka, Hideo Kanbe, Akio Izumi, Hideshi Abe, Masanori Ohashi, Atsushi Asai
  • Patent number: 5343060
    Abstract: The present invention is directed to a solid state imaging deice in which a light sensing region (3), a vertical register (4) and a channel stopper region (5) are formed within a well region (2) on an N-type silicon substrate (1). A positive electric charge storage region (6) is formed on the surface of the light sensing region (3) and a well region (7) is formed beneath the vertical register (4), respectively. Further, a transfer electrode (9) is selectively formed on the vertical register (4) through a gate insulating layer (8) and an Al light-intercepting layer (11) is formed on the transfer electrode (9) through an interlevel insulator (10). A surface protecting layer (12) is formed on the whole surface including the Al light-intercepting layer (11). In this solid state imaging device, a tapered portion (11a) is formed on the Al light-intercepting layer 11 corresponding to a peripheral edge portion of the light sensing region 3.
    Type: Grant
    Filed: January 21, 1993
    Date of Patent: August 30, 1994
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 5334829
    Abstract: A CCD image sensor includes a package (2) in which there are packaged a CCD solid state imaging device (1) in which a getter layer is formed on the rear surface of a silicon substrate and a photo-sensing portion and a CCD register are formed on the surface of the silicon substrate and a substrate electrode (3 ) of a plate configuration disposed on the lower surface of the CCD solid state imaging device (1 ). A heating device (5 ) is disposed on the lower surface of the substrate electrode (3 ) through an insulating material (4 ) of a plate configuration. The heating device (5) is formed of a resistance pattern (7) that is formed on the surface of an insulating body (6) of a plate configuration by a well-known thick film forming technique. A lattice defect that is caused by a metal ion or the like entered into the CCD solid state imaging device in accordance with an aging change can be repaired without disassembling the solid state image sensor.
    Type: Grant
    Filed: January 19, 1993
    Date of Patent: August 2, 1994
    Assignee: Sony Corporation
    Inventors: Takahisa Ueno, Hideshi Abe
  • Patent number: 5288656
    Abstract: In a CCD solid state image sensing device in which a photo-sensitive section is constructed by a photodiode formed by a PN junction between a first P-type well region and an N-type impurity diffusion region formed on an N-type silicon substrate, the N-type impurity diffusion region is formed by the ion implantation of single substance of arsenic (As). According to this CCD solid state image sensing device, a bright flaw on an image sensing screen, which is one of the defects encountered with an image sensing screen, can be reduced. Also, the n-type impurity diffusion region constructing the PN junction can be reduced in size and the CCD solid state image sensing device itself can be made compact in size. Further, a method of manufacturing a CCD solid state image sensing device also is provided.
    Type: Grant
    Filed: September 23, 1992
    Date of Patent: February 22, 1994
    Assignee: Sony Corporation
    Inventors: Takahisa Kusaka, Hideo Kanbe, Akio Izumi, Hideshi Abe, Masanori Ohashi, Atsushi Asai