Patents by Inventor Hideshi Fukumoto
Hideshi Fukumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7095117Abstract: A semiconductor device has a reduced number of external power terminals and is scaled down while suppressing power noise, and an electronic device is efficiently equipped with a bypass condenser. A package substrate has, on its surface, a semiconductor chip having a plurality of output circuits and at least one electrode for supplying a voltage to each of the output circuits, and is provided with external terminals on its back surface and has a plurality of wiring layers.Type: GrantFiled: September 14, 2004Date of Patent: August 22, 2006Inventors: Motoo Suwa, Yuichi Mabuchi, Atsushi Nakamura, Hideshi Fukumoto
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Patent number: 6871334Abstract: The invention provides a method of calculating an equivalent circuit, which reduces the number of elements constituting a network to a large extent with a target accuracy secured. The method of the invention calculates an equivalent circuit by a computer, with regard to an object that has a conductor, a dielectric to support the conductor, and plural input/output terminals to the outside.Type: GrantFiled: October 16, 2002Date of Patent: March 22, 2005Assignee: Hitachi, Ltd.Inventors: Yuichi Mabuchi, Hideshi Fukumoto
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Publication number: 20050029648Abstract: A semiconductor device has a reduced number of external power terminals and is scaled down while suppressing power noise, and an electronic device is efficiently equipped with a bypass condenser. A package substrate has, on its surface, a semiconductor chip having a plurality of output circuits and at least one electrode for supplying a voltage to each of the output circuits, and is provided with external terminals on its back surface and has a plurality of wiring layers.Type: ApplicationFiled: September 14, 2004Publication date: February 10, 2005Applicant: Renesas Technology Corp.Inventors: Motoo Suwa, Yuichi Mabuchi, Atsushi Nakamura, Hideshi Fukumoto
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Patent number: 6803659Abstract: A semiconductor device is provided that reduces the number of external power terminals. The device is intended for a flip-chip type BGA (ball grid array) package. On the surface of the packet substrate are a plurality of output circuits each outputting a signal formed by an internal circuit, a first voltage supply electrode which supplies an operating voltage to the internal circuit and a plurality of second voltage supply electrodes which supply operating voltages to the output circuits. On the back surface of the package substrate are external terminals and a plurality of wiring layers.Type: GrantFiled: October 11, 2002Date of Patent: October 12, 2004Assignee: Renesas Technology Corp.Inventors: Motoo Suwa, Yuichi Mabuchi, Atsushi Nakamura, Hideshi Fukumoto
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Patent number: 6791854Abstract: A semiconductor apparatus includes positive and negative side conductors for bridge-connecting semiconductor switches, constituted to a wide conductor, and laminated by sandwiching an insulator between them. A semiconductor apparatus includes positive and negative side conductors extended from its case, and an electrolytic capacitor connected to the extension portion of the positive and negative side conductors. A power converter uses the semiconductor apparatus.Type: GrantFiled: October 22, 2002Date of Patent: September 14, 2004Assignee: Hitachi, Ltd.Inventors: Shinji Shirakawa, Akira Mishima, Hideshi Fukumoto, Keiichi Mashino, Toshiyuki Innami
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Publication number: 20030109995Abstract: The invention provides a method of calculating an equivalent circuit, which reduces the number of elements constituting a network to a large extent with a target accuracy secured. The method of the invention calculates an equivalent circuit by a computer, with regard to an object that has a conductor, a dielectric to support the conductor, and plural input/output terminals to the outside.Type: ApplicationFiled: October 16, 2002Publication date: June 12, 2003Inventors: Yuichi Mabuchi, Hideshi Fukumoto
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Publication number: 20030080353Abstract: The present invention provides a semiconductor device which reduces the number of external power terminals and realizes its scale down while suppressing power noise, and an electronic device efficiently equipped with a bypass condenser.Type: ApplicationFiled: October 11, 2002Publication date: May 1, 2003Inventors: Motoo Suwa, Yuichi Mabuchi, Atsushi Nakamura, Hideshi Fukumoto
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Patent number: 6525950Abstract: A semiconductor power conversion device includes two bridge-connected semiconductor switches, an output terminal, and first and second pairs of positive and negative direct current terminals. First conductors connect the negative direct current terminals of the first and second pairs with the output terminal through one of the two bridge-connected semiconductor switches, while second conductors connect the positive direct current terminals of the first and second pairs with the other of the two bridge-connected semiconductor switches. A housing is provided, which includes the two bridge-connected semiconductor switches, and at least a portion of the first conductor and of the second conductor as a multilayer structure formed by sandwiching an insulator between the first and second conductors inside the housing. The first and second pairs of direct current terminals are arranged on one side of one plane of the housing.Type: GrantFiled: September 1, 2000Date of Patent: February 25, 2003Assignee: Hitachi, Ltd.Inventors: Shinji Shirakawa, Hideshi Fukumoto, Akira Mishima, Keiichi Mashino, Toshiyuki Innami
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Publication number: 20030031038Abstract: A semiconductor apparatus includes positive and negative side conductors for bridge-connecting semiconductor switches, constituted to a wide conductor, and laminated by sandwiching an insulator between them. A semiconductor apparatus includes positive and negative side conductors extended from its case, and an electrolytic capacitor connected to the extension portion of the positive and negative side conductors. A power converter uses the semiconductor apparatus.Type: ApplicationFiled: October 22, 2002Publication date: February 13, 2003Inventors: Shinji Shirakawa, Akira Mishima, Hideshi Fukumoto, Keiichi Mashino, Toshiyuki Innami
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Publication number: 20020195556Abstract: Disclosed is a mass spectrometer capable of highly sensitively and highly efficiently measuring the masses of ions regardless of the polarity, mass numbers and energy of the ions. An ion beam transport unit (5), a conversion dynode (6) and a secondary electron detecting system (7) are disposed so that an acute angle is formed between the direction of travel of an ion beam striking on the conversion dynode (6), and a line (75) connecting the center (64) of a secondary electron exit (63) to the center (73) of a scintillator (71). The center axis (74) of the scintillator (71) lies between an end (52) of the ion transport unit (5) and the center axis (64) of the secondary electron exit (63). Since the secondary electron exit (63) is apart from an electric field created between the ion transport unit (5) and the scintillator (71), the secondary electrons are able to reach the scintillator (71) without being deflected.Type: ApplicationFiled: August 26, 2002Publication date: December 26, 2002Applicant: Hitachi, Ltd.Inventors: Kiyomi Yoshinari, Hideshi Fukumoto, Katsuhiro Nakagawa, Fumihiko Nakajima
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Patent number: 6493249Abstract: A semiconductor apparatus includes positive and negative side conductors for bridge-connecting semiconductor switches, constituted to a wide conductor, and laminated by sandwiching an insulator between them. A semiconductor apparatus includes positive and negative side conductors extended from its case, and an electrolytic capacitor connected to the extension portion of the positive and negative side conductors. A power converter uses the semiconductor apparatus.Type: GrantFiled: February 26, 2001Date of Patent: December 10, 2002Assignee: Hitachi, Ltd.Inventors: Shinji Shirakawa, Akira Mishima, Hideshi Fukumoto, Keiichi Mashino, Toshiyuki Innami
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Publication number: 20020183946Abstract: An electromagnetic field analyzing method and an electromagnetic field analyzer and system for analyzer electromagnetic fields created in a rotary machine. An electromagnetic field is analyzed in a total analysis space of a rotary machine including a stator space containing a stator and a rotor space containing a rotor to determine a boundary field between the stator space and the rotor space.Type: ApplicationFiled: July 12, 2002Publication date: December 5, 2002Inventors: Kenji Miyata, Hideshi Fukumoto, Akiyoshi Komura, Kohji Maki
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Patent number: 6434491Abstract: A method of analyzing electromagnetic fields created in a rotary machine and an analyzer. The method and analyzer provide for an electromagnetic field in a total analysis space of a rotary machine including a stator space containing a stator and a rotor space containing a rotor to be analyzed to determined a boundary field between the stator space and the rotor space. The boundary field in a direction of rotation in modes is expanded and the modes obtained by expansion are converted into rotating magnetic field components. using the rotating magnetic field components as boundary conditions for a boundary between the stator space and the rotor space, an electromagnetic field in the stator space is analyzed and an electromagnetic field in the rotor space is analyzed.Type: GrantFiled: January 28, 2000Date of Patent: August 13, 2002Assignee: Hitachi, Ltd.Inventors: Kenji Miyata, Hideshi Fukumoto, Akiyoshi Komura, Kohji Maki
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Patent number: 6407509Abstract: A plasma display panel has a first substrate including a first dielectric layer which covers a plurality of address electrodes; back face barrier ribs, each of which is located between two neighboring address electrodes; a fluorescent layer which covers the back face barrier ribs and the first dielectric layer; and a second substrate including plural pairs of X sustain electrodes and Y sustain electrodes, which are arranged to cross at right angles to the address electrodes, and a second dielectric layer which covers the sustain electrodes. The first substrate is arranged opposite to the second substrate via a discharge space which is filled with gas for radiating ultraviolet rays to make the fluorescent layer emit light and buffer gas, and the thickness of the second dielectric layer in the second substrate is set to be larger at a portion between the X and Y sustain electrodes.Type: GrantFiled: October 25, 2000Date of Patent: June 18, 2002Assignee: Hitachi, Ltd.Inventors: Yuichi Ikeda, Masayuki Shibata, Hideshi Fukumoto, Keizo Suzuki, Masaji Ishigaki
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Publication number: 20020011363Abstract: A semiconductor apparatus includes positive and negative side conductors for bridge-connecting semiconductor switches, constituted to a wide conductor, and laminated by sandwiching an insulator between them. A semiconductor apparatus includes positive and negative side conductors extended from its case, and an electrolytic capacitor connected to the extension portion of the positive and negative side conductors. A power converter uses the semiconductor apparatus.Type: ApplicationFiled: February 26, 2001Publication date: January 31, 2002Inventors: Shinji Shirakawa, Akira Mishima, Hideshi Fukumoto, Keiichi Mashino, Toshiyuki Innami
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Patent number: 6245190Abstract: A plasma processing apparatus and a method therefor which can achieve a preferred process rate, a fine pattern process capability, a selectivity and uniformity of processing at the same time compatibly for a large size wafer, which effects are achieved by controlling the plasma state and the dissociation state of etching gas through control of the electron resonance through application of a magnetic field thereto. A high frequency power at 20-300 MHz is applied across a pair of electrodes in a vacuum process chamber, and a magnetic field is formed parallel to the plane of the electrodes in the space between the electrodes. By controlling the intensity of the magnetic field in a range of 100 gauss or smaller, formation of electron cyclotron resonance and electron sheath resonance occurring from interaction between the electrical field and the magnetic field in the electrode sheath portion is controlled. Thereby, the plasma state, i.e.Type: GrantFiled: March 26, 1998Date of Patent: June 12, 2001Assignee: Hitachi, Ltd.Inventors: Toshio Masuda, Katsuhiko Mitani, Tetsunori Kaji, Jun'ichi Tanaka, Katsuya Watanabe, Shigeru Shirayone, Toru Otsubo, Ichiro Sasaki, Hideshi Fukumoto, Makoto Koizumi
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Patent number: 5838549Abstract: In semiconductor modules having a plurality of semiconductor devices mounted on a multilayer printed circuit boards as the processing speed increases, a short circuit current flowing through CMOS devices in the semiconductor devices during operation can cause noise because of ground inductance or power supply inductance. This noise can result in erroneous operations. To solve this problem, the power supply layer or grand layer that is connected to either the power supply terminal Vcc or the ground terminal Gnd of each semiconductor memory, which is located farther from the connection terminals, is arranged closer to the semiconductor memories with this arrangement, the short circuit current flowing through the semiconductor memories is more strongly magnetically coupled with the power supply layer or ground layer arranged close to them. Thus, it is possible to reduce the effective inductance. This, in turn, reduces noise, making it possible to provide a semiconductor module with an increased processing speed.Type: GrantFiled: January 27, 1997Date of Patent: November 17, 1998Assignee: Hitachi, Ltd.Inventors: Tatsuya Nagata, Hiroya Shimizu, Atsushi Nakamura, Hideshi Fukumoto, Toshio Sugano
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Patent number: 5424702Abstract: A beam member which is installed at diametral portion in a ring shape superconducting coil container for supporting hoop stress of the coil, or a portion of radiant heat shield covering the beam member, is partly or entirely composed of electrical insulators or high resistivity materials. In accordance with the above composition, eddy current which is generated in the coil container when the superconducting coil container crosses magnetic field caused by eddy current which is generated in the radiant heat shield when the radiant heat shield crosses strong magnetic field caused by the superconducting coils with relative vibration of the radiant heat shield to the superconducting coil by a dynamic cause can be suppressed. Accordingly, heat generation in the superconducting coil container can be reduced, and consequently, generation of quenching can be prevented.Type: GrantFiled: November 3, 1994Date of Patent: June 13, 1995Assignee: Hitachi, Ltd.Inventors: Yoko Kameoka, Hideshi Fukumoto, Ken Yoshioka, Teruhiro Takizawa, Tadasi Sonobe, Fumio Suzuki
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Patent number: 5343180Abstract: There is disclosed a coil structure which can be rapidly energized or excited, and which reduces the generation of heat in a coil container by an eddy current due to a dynamic disturbance such as vibration and a magnetic field fluctuation, thereby suppressing the occurrence a quench. The coil container is constituted by a low-resistivity material, and a high-resistivity portion is provided at at least one portion of the coil container in the direction of the periphery of the coil container. The high-resistivity portion is provided at a position where a vibration displacement is small or a magnetic field fluctuation is small. When the coil structure is to be energized or excited, the eddy current produced in the direction of the periphery of the superconducting-coil container can be reduced at the high-resistivity portion, and when the dynamic disturbance develops, the generation of heat by the eddy current is suppressed by the low-resistivity material.Type: GrantFiled: March 25, 1992Date of Patent: August 30, 1994Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.Inventors: Hideshi Fukumoto, Yoko Kameoka, Ken Yoshioka, Teruhiro Takizawa, Tadasi Sonobe, Fumio Suzuki, Naoki Kasahara, Fumihiko Goto, Shigeru Sakamoto, Masayuki Shibata
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Patent number: 5222437Abstract: A levitation system of a magnetically levitated train is provided wherein superconducting magnets are installed in a car body, and the first layer and the second layer of levitation coils are so arranged as to be in a shifted location relative to each other in the moving direction of the train. By making the levitation coils two layers and by arranging the two layers in the shifted location relative to each other in the moving direction, amplitude of higher harmonic waves is reduced to a very small level, substantially to zero.Type: GrantFiled: February 18, 1992Date of Patent: June 29, 1993Assignee: Hitachi, Ltd.Inventors: Masayuki Shibata, Naoki Maki, Toshio Saitoh, Takashi Kobayashi, Teruhiro Takizawa, Tadasi Sonobe, Shizuo Tsujimoto, Hideshi Fukumoto