Patents by Inventor Hideto FUKUMOTO

Hideto FUKUMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9219134
    Abstract: A semiconductor device has a semiconductor layer, a floating gate electrode provided over the semiconductor layer via a first insulation film, and an erase gate electrode to which an erase voltage is applied. The floating gate electrode has an opposing region that opposes via a second insulation film to the erase gate electrode. The opposing region has such a shape that multiple electric field concentrating portions are formed when the erase voltage is applied to the erase gate electrode.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: December 22, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Fukumoto
  • Publication number: 20140126299
    Abstract: A semiconductor device has a semiconductor layer, a floating gate electrode provided over the semiconductor layer via a first insulation film, and an erase gate electrode to which an erase voltage is applied. The floating gate electrode has an opposing region that opposes via a second insulation film to the erase gate electrode. The opposing region has such a shape that multiple electric field concentrating portions are formed when the erase voltage is applied to the erase gate electrode.
    Type: Application
    Filed: October 30, 2013
    Publication date: May 8, 2014
    Applicant: Renesas Electronics Corporation
    Inventor: Hideto FUKUMOTO