Patents by Inventor Hideto Furuyama

Hideto Furuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11843223
    Abstract: According to one embodiment, the first process of forming a first light-reflecting structure including forming a patterned dielectric layer on a substrate, forming a first high refractive index layer on the substrate and the dielectric layer, planarizing the first high refractive index layer, forming a mask layer on the first high refractive index layer, forming a periodic structure in the mask layer and the first high refractive index layer, the periodic structure having openings separated at a constant period, forming a low refractive index layer on the mask layer and filling the periodic structure with the low refractive index layer, and performing chemical mechanical polishing to cause the mask layer and the low refractive index layer to form substantially the same plane.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: December 12, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Ohira, Hideto Furuyama
  • Publication number: 20230288651
    Abstract: A semiconductor device includes a substrate; a holding member located on the substrate, the holding member including a module placement part and an opening arranged in a first direction; an optical module located in the module placement part and mounted on the substrate; and an optical fiber passing through the opening, the optical fiber being connected with the optical module. The holding member includes a first corner part and a second corner part. The opening is between the first corner part and the second corner part in a direction crossing the first direction. The first corner part and the second corner part are beveled.
    Type: Application
    Filed: August 23, 2022
    Publication date: September 14, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya OHIRA, Hideto FURUYAMA
  • Publication number: 20230288652
    Abstract: A semiconductor device includes a substrate; a holding member located on the substrate, the holding member including an optical fiber holding part and a module placement part arranged in a first direction; an optical module located in the module placement part and mounted on the substrate; an optical fiber passing through the optical fiber holding part, the optical fiber being connected with the optical module; and a first leaf spring and a second leaf spring located in the optical fiber holding part, the first leaf spring and the second leaf spring holding the optical fiber between the first leaf spring and the second leaf spring in a direction crossing the first direction.
    Type: Application
    Filed: August 19, 2022
    Publication date: September 14, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya OHIRA, Hideto FURUYAMA
  • Publication number: 20230290698
    Abstract: A semiconductor device includes a holding member including a component placement part; a back plate; a substrate including a mounting surface facing the holding member, and a back surface facing the back plate; a plurality of mounting pads located at the mounting surface; a package component including a terminal placement surface facing the mounting surface; and a plurality of package terminals located at the terminal placement surface. The substrate is held between the holding member and the back plate. The package component is located in the component placement part, and held between the holding member and the substrate. The package terminals are in direct contact with the mounting pads.
    Type: Application
    Filed: August 26, 2022
    Publication date: September 14, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya OHIRA, Hideto FURUYAMA
  • Publication number: 20230290753
    Abstract: A distance between outermost parts of alignment chips in a direction normal to a surface of a substrate is different between a first direction and a second direction along terminal placement surfaces. The plurality of alignment chips include a first alignment chip fixed to a first metal pad, and a second alignment chip fixed to a second metal pad. The first alignment chip and the second alignment chip are oriented in different directions on the surface of the substrate. A semiconductor module includes a first side surface part extending in the second direction and facing the first alignment chip, and a groove part formed in a portion of the first side surface part. A portion of the second alignment chip is positioned in the groove part.
    Type: Application
    Filed: August 23, 2022
    Publication date: September 14, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hideto FURUYAMA
  • Publication number: 20230291473
    Abstract: A parallel receiver module includes a plurality of signal transmission lines arranged in a first direction; and a receiving semiconductor chip including a plurality of receiving channels arranged in the first direction. The plurality of receiving channels includes receiving circuits configured to receive signals from the signal transmission lines. At least one receiving channel among the plurality of receiving channels further includes a monitor circuit monitoring a receiving level of the signal from the signal transmission line. The at least one receiving channel is connectable with the signal transmission line by switching between the receiving circuit and the monitor circuit.
    Type: Application
    Filed: August 22, 2022
    Publication date: September 14, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hideto FURUYAMA
  • Patent number: 11594492
    Abstract: According to one embodiment, a semiconductor device includes at least a package substrate, an external electrode, a mounting substrate, and a mounting electrode. A signal connection point of the external electrode is provided at an end portion in a longitudinal direction of the external electrode. A signal connection point of the mounting electrode is provided at an end portion of the mounting electrode. The end portion of the mounting electrode is opposite to the signal connection point of the external electrode facing to the mounting electrode in the longitudinal direction.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: February 28, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Furuyama
  • Publication number: 20220238447
    Abstract: According to one embodiment, a semiconductor device includes at least a package substrate, an external electrode, a mounting substrate, and a mounting electrode. A signal connection point of the external electrode is provided at an end portion in a longitudinal direction of the external electrode. A signal connection point of the mounting electrode is provided at an end portion of the mounting electrode. The end portion of the mounting electrode is opposite to the signal connection point of the external electrode facing to the mounting electrode in the longitudinal direction.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hideto FURUYAMA
  • Patent number: 11328995
    Abstract: According to one embodiment, a semiconductor device includes at least a package substrate, an external electrode, a mounting substrate, and a mounting electrode. A signal connection point of the external electrode is provided at an end portion in a longitudinal direction of the external electrode. A signal connection point of the mounting electrode is provided at an end portion of the mounting electrode. The end portion of the mounting electrode is opposite to the signal connection point of the external electrode facing to the mounting electrode in the longitudinal direction.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 10, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hideto Furuyama
  • Publication number: 20220107397
    Abstract: According to one embodiment, a LIDAR system includes a laser oscillator, a collimator lens, a scan device, and a prism. The laser oscillator emits laser light. The collimator lens converts the laser light to parallel light. The scan device includes a reflective surface on which the laser light that has passed through the collimator lens is reflected, and a rotation device rotating the reflective surface around a rotation axis. The prism has a first surface and a second surface, and emits, from the second surface, the laser light that has been reflected on the reflective surface to enter the first surface.
    Type: Application
    Filed: September 9, 2021
    Publication date: April 7, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi HIRONO, Yoichiro KURITA, Hideto FURUYAMA
  • Patent number: 11239145
    Abstract: According to one embodiment, the electrode pads are provided at a surface of the substrate. The metal pad is provided at the surface of the substrate. The electronic component is mounted to the surface of the substrate. The electronic component includes a plurality of opposing electrodes. The opposing electrodes oppose the electrode pads in a direction toward the surface direction and are electrically connected to the electrode pads. The positioning component is fixed to the metal pad. A gap between the positioning component and the electronic component in an in-plane direction of the surface of the substrate is shorter than a minimum distance of the electrode pads.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: February 1, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoichiro Kurita, Hideto Furuyama
  • Patent number: 11158483
    Abstract: A charged particle beam deflection device includes a substrate; a plurality of apertures provided in the substrate; a plurality of electrodes deflecting charged particle beams passing through the apertures; a plurality of light-receiving elements controlling voltages applied to the plurality of electrodes; a first optical coupler coupling continuous light to the substrate; a light distributor distributing light coupled by the first optical coupler into a two-dimensional plane; a plurality of modulators performing intensity modulation of light distributed by the light distributor; and a plurality of second optical couplers coupling the modulated light to the light-receiving elements.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: October 26, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya Ohira, Hideto Furuyama
  • Publication number: 20210287873
    Abstract: A charged particle beam deflection device includes a substrate; a plurality of apertures provided in the substrate; a plurality of electrodes deflecting charged particle beams passing through the apertures; a plurality of light-receiving elements controlling voltages applied to the plurality of electrodes; a first optical coupler coupling continuous light to the substrate; a light distributor distributing light coupled by the first optical coupler into a two-dimensional plane; a plurality of modulators performing intensity modulation of light distributed by the light distributor; and a plurality of second optical couplers coupling the modulated light to the light-receiving elements.
    Type: Application
    Filed: September 4, 2020
    Publication date: September 16, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya OHIRA, Hideto FURUYAMA
  • Publication number: 20210175688
    Abstract: According to one embodiment, the first process of forming a first light-reflecting structure including forming a patterned dielectric layer on a substrate, forming a first high refractive index layer on the substrate and the dielectric layer, planarizing the first high refractive index layer, forming a mask layer on the first high refractive index layer, forming a periodic structure in the mask layer and the first high refractive index layer, the periodic structure having openings separated at a constant period, forming a low refractive index layer on the mask layer and filling the periodic structure with the low refractive index layer, and performing chemical mechanical polishing to cause the mask layer and the low refractive index layer to form substantially the same plane.
    Type: Application
    Filed: February 18, 2021
    Publication date: June 10, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya OHIRA, Hideto FURUYAMA
  • Patent number: 10958042
    Abstract: According to one embodiment, the first process of forming a first light-reflecting structure including forming a patterned dielectric layer on a substrate, forming a first high refractive index layer on the substrate and the dielectric layer, planarizing the first high refractive index layer, forming a mask layer on the first high refractive index layer, forming a periodic structure in the mask layer and the first high refractive index layer, the periodic structure having openings separated at a constant period, forming a low refractive index layer on the mask layer and filling the periodic structure with the low refractive index layer, and performing chemical mechanical polishing to cause the mask layer and the low refractive index layer to form substantially the same plane.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: March 23, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya Ohira, Hideto Furuyama
  • Publication number: 20210035900
    Abstract: According to one embodiment, the electrode pads are provided at a surface of the substrate. The metal pad is provided at the surface of the substrate. The electronic component is mounted to the surface of the substrate. The electronic component includes a plurality of opposing electrodes. The opposing electrodes oppose the electrode pads in a direction toward the surface direction and are electrically connected to the electrode pads. The positioning component is fixed to the metal pad. A gap between the positioning component and the electronic component in an in-plane direction of the surface of the substrate is shorter than a minimum distance of the electrode pads.
    Type: Application
    Filed: March 4, 2020
    Publication date: February 4, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoichiro KURITA, Hideto FURUYAMA
  • Patent number: 10854424
    Abstract: According to one embodiment, a multi-electron beam device includes at least: a light-emitting element array; a drive circuit controlling the light-emitting element array in a desired light emission pattern; a photoelectric film emitting electrons due to light emitted by the light-emitting elements; a microchannel plate having microchannels multiplying the electrons, the microchannels being arranged at positions corresponding to the light-emitting elements of the light-emitting element array; and an aperture array having apertures arranged at positions corresponding to the microchannels, the apertures being narrower than output apertures of the microchannels and limiting electron beam sizes emitted from the microchannel plate. At least the photoelectric film, the microchannel plate, and the aperture array are disposed inside a vacuum optical column.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: December 1, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Furuyama
  • Patent number: 10845551
    Abstract: According to one embodiment, a via holds an optical fiber and has an opening in at least a first surface of a silicon substrate. An interconnect is provided at a second surface of the silicon substrate and connected to an optical semiconductor element. Side-surface electrodes are provided at a third surface of the silicon substrate. The third surface is other than the first surface and the second surface of the silicon substrate. At least a portion of the side-surface electrodes is connected to the interconnect. At least a portion of the side-surface electrodes have different lengths along the third surface.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: November 24, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Furuyama
  • Publication number: 20200286833
    Abstract: According to one embodiment, a semiconductor device includes at least a package substrate, an external electrode, a mounting substrate, and a mounting electrode. A signal connection point of the external electrode is provided at an end portion in a longitudinal direction of the external electrode. A signal connection point of the mounting electrode is provided at an end portion of the mounting electrode. The end portion of the mounting electrode is opposite to the signal connection point of the external electrode facing to the mounting electrode in the longitudinal direction.
    Type: Application
    Filed: November 26, 2019
    Publication date: September 10, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hideto FURUYAMA
  • Publication number: 20200279717
    Abstract: According to one embodiment, a multi-electron beam device includes at least: a light-emitting element array; a drive circuit controlling the light-emitting element array in a desired light emission pattern; a photoelectric film emitting electrons due to light emitted by the light-emitting elements; a microchannel plate having microchannels multiplying the electrons, the microchannels being arranged at positions corresponding to the light-emitting elements of the light-emitting element array; and an aperture array having apertures arranged at positions corresponding to the microchannels, the apertures being narrower than output apertures of the microchannels and limiting electron beam sizes emitted from the microchannel plate. At least the photoelectric film, the microchannel plate, and the aperture array are disposed inside a vacuum optical column.
    Type: Application
    Filed: September 9, 2019
    Publication date: September 3, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hideto FURUYAMA