Patents by Inventor Hideto Isono

Hideto Isono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6392309
    Abstract: A semiconductor device such as a solid state imaging device has a semiconductor chip mounted on a bottom surface of a cavity of a hermetic sealed box-shaped resin-molded package. The device comprises a radiator plate provided in a bottom wall of the package under the cavity or on the bottom surface of the cavity. The semiconductor chip and the radiator plate are bonded with an adhesive having a larger thermal conductivity than that of the resin forming the package. The radiator plate may be a part of a lead frame.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: May 21, 2002
    Assignee: Sony Corporation
    Inventors: Yukinobu Wataya, Hideto Isono
  • Patent number: 5811845
    Abstract: A semiconductor apparatus connected between a signal input line and a grounding line is formed on a semiconductor substrate with a protection circuit connected between the signal input line and the grounding line, in parallel with the semiconductor apparatus. The protection circuit is formed, for example, of bipolar transistors, diodes, or MOS transistors.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: September 22, 1998
    Assignee: Sony Corporation
    Inventors: Hideto Isono, Hiroshi Hibi
  • Patent number: 5641981
    Abstract: A semiconductor apparatus connected between a signal input line and a grounding line is formed on a semiconductor substrate with a protection circuit connected between the signal input line and the grounding line, in parallel with the semiconductor apparatus. The protection circuit is formed, for example, of bipolar transistors, diodes, or MOS transistors. The protection circuit is designed to prevent an excess signal supplied on the signal line from damaging the semiconductor apparatus, such as by breaking down a dielectric layer formed at a gate of a MOS transistor. The protection circuit may further be connected to a potential line that is connected to an external source of voltage.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: June 24, 1997
    Assignee: Sony Corporation
    Inventors: Hideto Isono, Hiroshi Hibi
  • Patent number: 5373179
    Abstract: A protective circuit protects a plurality of protected portions having different withstand voltages and operation voltages of an active portion of a CCD solid state imaging device or the like by protective elements (e.g., transistors). The respective protected portions can be protected in an optimum fashion in response to the withstand voltages and operation voltages thereof. The breakdown voltages of the respective protective transistors are made different in response to the withstand voltages and operation voltages of the protected portions.
    Type: Grant
    Filed: August 6, 1993
    Date of Patent: December 13, 1994
    Assignee: Sony Corportion
    Inventors: Hiromichi Matsui, Isao Hirota, Hideto Isono, Hiroshi Hibi
  • Patent number: 5371392
    Abstract: A semiconductor apparatus connected between a signal input line and a grounding line is formed on a semiconductor substrate with a protection circuit connected between the signal input line and the grounding line, in parallel with the semiconductor apparatus. The protection circuit is formed, for example, of bipolar transistors, diodes, or MOS transistors.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: December 6, 1994
    Assignee: Sony Corporation
    Inventors: Hideto Isono, Hiroshi Hibi