Patents by Inventor Hideto Kobayashi

Hideto Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8014118
    Abstract: A load driving circuit in which a load is connected to the connecting point of transistors as low-side and high-side main switch elements that have a totem pole structure and are connected between a pair of drive voltage supply lines. A protection circuit section is provided for the high-side transistor. In the protection circuit section, a resistor as a voltage control element is provided for a MOSFET as an overvoltage prevention switch and a capacitor is connected between the gate and the drain of the MOSFET.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: September 6, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Koji Ikegami, Hideto Kobayashi, Hitoshi Sumida, Hiroshi Shimabukuro
  • Patent number: 7995046
    Abstract: A display driving device outputting a driving signal to a display includes a high-voltage power supply terminal, an output terminal, a high-side output transistor connected between the high-voltage power supply terminal and the output terminal, a reference power supply terminal, a low-side output transistor connected between the output terminal and the reference power supply terminal, a buffer circuit including two MOS transistors connected in series, and a discharge element discharging charge stored in a gate of the low-side output transistor, wherein the gate of the low-side output transistor is connected to a connecting point of the two MOS transistors and the discharge element. Thus, even if electrostatic discharge is repeatedly applied to the output terminal by a positive charge as against the ground potential in the display driving apparatus, the low-side output transistor can be prevented from being damaged without charge stored in the gate of the low-side output transistor.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: August 9, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Hideto Kobayashi
  • Patent number: 7876291
    Abstract: A display panel drive device of reduced area occupied by circuit elements. The display panel drive device includes an output stage circuit having a low side selector circuit constituted by connecting in series inverters and a buffer circuit, n-channel IGBTs, a Zener diode and resistance respectively connected between the gate and emitter of the IGBT, a buffer circuit, and a high side selector circuit including an inverter. The buffer circuit includes a high side Pch-MOS operated by a logic signal from the high side selector circuit and a low side Nch-MOS operated by a logic signal of the low side selector circuit.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: January 25, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Hideto Kobayashi, Gen Tada, Yoshihiro Shigeta, Hiroshi Shimabukuro
  • Patent number: 7773051
    Abstract: A display apparatus driving circuitry for driving a plasma display panel. A first transistor is electrically connected between an output terminal and a high-voltage power supply terminal. A second transistor is connected between the output terminal and a reference power supply terminal. A buffer circuit supplies a voltage lower than a low voltage VDL for logic to a gate of the second transistor to make a drop in an output waveform gradual during an address electrical discharge. In a preferred embodiment, during this drop in the output waveform, a p-channel type MOSFET of the buffer circuit is turned on, whereby the VDL is suppressed due to a back gate effect. Therefore, a signal at a potential lower than the VDL is inputted to the gate of the second transistor. As a result, the drop in the second transistor output waveform is gradual, so that noise and damage are prevented.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: August 10, 2010
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Hideto Kobayashi
  • Publication number: 20100115007
    Abstract: A playlist editing apparatus includes a management unit 11 that manages a playlist, a playlist name input unit 12 for newly setting a playlist name, a determination unit 13 that determines whether conversion of a character code of a playlist name set for an existing playlist is required, based on a relationship with a character code of a set playlist name, a changing unit 14 that changes a character code flag of the existing playlist to a flag corresponding to a character code to be converted to, when it is determined that character code conversion is required, a character code conversion unit 15 that converts a character string targeted for conversion to a designated character code, in response to changing of the character code flag, and a playlist name setting unit 16 that sets the converted character string as the playlist name. This enables a playlist to be edited so that inconsistency in character codes throughout the playlist and the disk does not occur.
    Type: Application
    Filed: March 10, 2008
    Publication date: May 6, 2010
    Applicant: PANASONIC CORPORATION
    Inventor: Hideto Kobayashi
  • Patent number: 7664375
    Abstract: In an information signal editing device, when a user specifies a desired reproduction section or reproduction start position, a management information file recorded in a memory is rewritten into a second management information file which is created on the basis of the specified information, and a second information file is set on the basis of the second management information file. The information signal editing device constructed as described performs arbitrary virtual editing when a DVD-RAM disk is non-rewritable, whereby the user can obtain a desired reproduction signal.
    Type: Grant
    Filed: May 27, 2002
    Date of Patent: February 16, 2010
    Assignee: Panasonic Corporation
    Inventors: Nobuyuki Ogawa, Shunji Kagamibashi, Atsuo Tsuji, Kiyoshi Tominaga, Wataru Masuda, Yoshimitsu Nakamura, Haruhiko Tada, Hideto Kobayashi
  • Patent number: 7606082
    Abstract: The semiconductor circuit includes a voltage-controlled semiconductor device (N)N, the resistance value of which is controllable with a high voltage, the drain terminal of the N can be connected to the gate terminal (control terminal) of an output semiconductor device (NO) via a resistor (R) or to a last output stage of the driver circuit, the source terminal of the N is connected to the emitter terminal of the NO, and the gate terminal of the N is connected to the collector terminal, which is the output terminal, of the NO. When the input terminal of the semiconductor circuit is at the Hi-level, the NO OFF. By connecting the output terminal of the NO to the high-potential-side of a high-voltage circuit disposed separately and the negative electrode of a control power supply (VDD) to the low-potential-side of the high-voltage circuit in the state, in which the NO is OFF, a desired high voltage is applied between the collector and emitter of the NO.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: October 20, 2009
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Hiroshi Shimabukuro, Hideto Kobayashi, Yoshihiro Shigeta, Gen Tada
  • Publication number: 20080244219
    Abstract: A control system enables a plurality of users to execute a single-user application simultaneously in a multi-user OS which causes address conflicts under simultaneous execution and save results for each user avoiding the address conflicts. The control system comprises a control unit 10 which changes write addresses of applications 51-53 which cause address conflicts under simultaneous execution in a multi-user OS from original addresses specific to each application to a mapped address in a subordinate directory of any of user profile directories 61, 62 specific to each user who runs the application(s) 51-53.
    Type: Application
    Filed: March 14, 2008
    Publication date: October 2, 2008
    Inventor: HIDETO KOBAYASHI
  • Publication number: 20080211740
    Abstract: In a display driving device which performs scan driving of a PDP or similar, to enable rapid scan operation, reduction of the chip size, and lowering of costs, as well as elimination of coupling problems. The display driving device is provided with a pull-up switching element Nu connected to a first driving voltage (VDH) supply line and common to all bits; diodes D1 to DN for each bit, connected between the pull-up switching element Nu and driving voltage output terminals for each bit; pull-down switching elements Nd1 to NdN for each bit, connected between a second driving voltage (GND) supply line and the driving voltage output terminals for each bit; and resistance elements R1 to RN for each bit, connected between the first driving voltage supply line and the pull-down switching elements Nd1 to NdN.
    Type: Application
    Filed: November 16, 2007
    Publication date: September 4, 2008
    Applicant: Fuji Electric Device Technology Co., Ltd
    Inventors: Kazuhiro Matsunami, Hideto Kobayashi, Makoto Tanaka
  • Publication number: 20080203926
    Abstract: A load driving circuit in which a load is connected to the connecting point of transistors as low-side and high-side main switch elements that have a totem pole structure and are connected between a pair of drive voltage supply lines. A protection circuit section is provided for the high-side transistor. In the protection circuit section, a resistor as a voltage control element is provided for a MOSFET as an overvoltage prevention switch and a capacitor is connected between the gate and the drain of the MOSFET.
    Type: Application
    Filed: February 25, 2008
    Publication date: August 28, 2008
    Applicant: Fuji Electric Device Technology Co., Ltd.
    Inventors: Koji Ikegami, Hideto Kobayashi, Hitoshi Sumida, Hiroshi Shimabukuro
  • Publication number: 20080068369
    Abstract: A display driving device outputting a driving signal to a display includes a high-voltage power supply terminal, an output terminal, a high-side output transistor connected between the high-voltage power supply terminal and the output terminal, a reference power supply terminal, a low-side output transistor connected between the output terminal and the reference power supply terminal, a buffer circuit including two MOS transistors connected in series, and a discharge element discharging charge stored in a gate of the low-side output transistor, wherein the gate of the low-side output transistor is connected to a connecting point of the two MOS transistors and the discharge element. Thus, even if electrostatic discharge is repeatedly applied to the output terminal by a positive charge as against the ground potential in the display driving apparatus, the low-side output transistor can be prevented from being damaged without charge stored in the gate of the low-side output transistor.
    Type: Application
    Filed: August 30, 2007
    Publication date: March 20, 2008
    Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
    Inventor: Hideto Kobayashi
  • Publication number: 20070064476
    Abstract: The semiconductor circuit includes a voltage-controlled semiconductor device (N)N, the resistance value of which is controllable with a high voltage, the drain terminal of the N can be connected to the gate terminal (control terminal) of an output semiconductor device (NO) via a resistor (R) or to a last output stage of the driver circuit, the source terminal of the N is connected to the emitter terminal of the NO, and the gate terminal of the N is connected to the collector terminal, which is the output terminal, of the NO. When the input terminal of the semiconductor circuit is at the Hi-level, the NO OFF. By connecting the output terminal of the NO to the high-potential-side of a high-voltage circuit disposed separately and the negative electrode of a control power supply (VDD) to the low-potential-side of the high-voltage circuit in the state, in which the NO is OFF, a desired high voltage is applied between the collector and emitter of the NO.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 22, 2007
    Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
    Inventors: Hiroshi SHIMABUKURO, Hideto KOBAYASHI, Yoshihiro SHIGETA, Gen TADA
  • Patent number: 7173454
    Abstract: A display device driver circuit includes a timer circuit 20 that outputs to output stage circuits 10 a control signal for turning off IGBTs 11 and 12 when a next clock signal is not inputted to the timer circuit 20 for a predetermined period of time, and the output stage circuits 10 turn off the IGBTs 11 and 12 to put the output terminals DO thereof into a high impedance state so that an overcurrent may be prevented from flowing through the IGBTs 11 and 12.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: February 6, 2007
    Assignee: Fuji Electric Device Technology Co., Ltd
    Inventors: Hideto Kobayashi, Gen Tada, Yoshihiro Shigeta, Hiroshi Shimabukuro
  • Publication number: 20060223254
    Abstract: A display panel drive device of reduced area occupied by circuit elements. The display panel drive device includes an output stage circuit having a low side selector circuit constituted by connecting in series inverters and a buffer circuit, n-channel IGBTs, a Zener diode and resistance respectively connected between the gate and emitter of the IGBT, a buffer circuit, and a high side selector circuit including an inverter. The buffer circuit includes a high side Pch-MOS operated by a logic signal from the high side selector circuit and a low side Nch-MOS operated by a logic signal of the low side selector circuit.
    Type: Application
    Filed: February 27, 2006
    Publication date: October 5, 2006
    Inventors: Hideto Kobayashi, Gen Tada, Yoshihiro Shigeta, Hiroshi Shimabukuro
  • Publication number: 20060072395
    Abstract: An AV data conversion apparatus has a verification file confirmation means (11) for reading an AV data file (101) containing AV data including video information and audio information, and a verification file (102) for the AV data file, and confirming if the AV data file and verification file mutually correspond; a plurality of stream conversion means (13) for changing the AV data to a specific format; and a conversion method determining means (12) for selecting from among the plural stream conversion means at least one stream conversion means for changing the AV data to the specific format based on verification file content.
    Type: Application
    Filed: July 9, 2003
    Publication date: April 6, 2006
    Inventor: Hideto Kobayashi
  • Publication number: 20050195179
    Abstract: A display device driver circuit includes a timer circuit 20 that outputs to output stage circuits 10 a control signal for turning off IGBTs 11 and 12 when a next clock signal is not inputted to the timer circuit 20 for a predetermined period of time, and the output stage circuits 10 turn off the IGBTs 11 and 12 to put the output terminals Do thereof into a high impedance state so that an overcurrent may be prevented from flowing through the IGBTs 11 and 12.
    Type: Application
    Filed: February 23, 2005
    Publication date: September 8, 2005
    Inventors: Hideto Kobayashi, Gen Tada, Yoshihiro Shigeta, Hiroshi Shimabukuro
  • Publication number: 20050035960
    Abstract: A display apparatus driving circuitry for driving a plasma display panel. A first transistor is electrically connected between an output terminal and a high-voltage power supply terminal. A second transistor is connected between the output terminal and a reference power supply terminal. A buffer circuit supplies a voltage lower than a low voltage VDL for logic to a gate of the second transistor to make a drop in an output waveform gradual during an address electrical discharge. In a preferred embodiment, during this drop in the output waveform, a p-channel type MOSFET of the buffer circuit is turned on, whereby the VDL is suppressed due to a back gate effect. Therefore, a signal at a potential lower than the VDL is inputted to the gate of the second transistor. As a result, the drop in the second transistor output waveform is gradual, so that noise and damage are prevented.
    Type: Application
    Filed: July 16, 2004
    Publication date: February 17, 2005
    Inventor: Hideto Kobayashi
  • Publication number: 20030165320
    Abstract: In an information signal editing device according to the present invention, when a user specifies a desired reproduction section or reproduction start position through a reproduction section specifying means (26) or a reproduction start position specifying means (27), a management information file recorded in a memory (102) is rewritten into a second management information file which is created on the basis of the specified information, and a second information file is set by a management information setting means (100) on the basis of the second management information file.
    Type: Application
    Filed: January 24, 2003
    Publication date: September 4, 2003
    Inventors: Nobuyuki Ogawa, Shunji Kagamibashi, Atsuo Tsuji, Kiyoshi Tominaga, Wataru Masuda, Haruhiko Tada, Hideto Kobayashi
  • Patent number: 5015154
    Abstract: A wobble plate type compressor with a variable displacement mechanism including a compressor housing is disclosed. A cylinder block including a plurality of cylinders is disposed in said compressor housing and a crank chamber is formed between the end of said cylinder block and a front end plate. An inclined plate is attached to a cam rotor which is further attached to a drive shaft. Rotational motion of the drive shaft is converted by the cam rotor and the inclined plate into nutational motion of the wobble plate. A plurality of pistons are coupled to the wobble plate with each piston being reciprocably fitted within a respective one of the cylinders. A rotation preventing mechanism includes a guide plate disposed at the bottom of the compressor housing, parallel with the drive shaft. A cylindrical block is rotatably disposed within a hole formed in an extended portion of the wobble plate.
    Type: Grant
    Filed: July 6, 1989
    Date of Patent: May 14, 1991
    Assignee: Sanden Corporation
    Inventors: Teruo Higuchi, Kiyoshi Terauchi, Kazuhiko Takai, Sei Kikuchi, Hideto Kobayashi
  • Patent number: 4954050
    Abstract: A wobble plate type compressor with a variable displacement mechanism including a compressor housing is disclosed. A cylinder block including a plurality of cylinders is disposed in said compressor housing and a crank chamber is formed between the end of said cylinder block and a front end plate. An inclined plate is attached to a cam rotor which is further attached to a drive shaft. Rotational motion of the drive shaft is converted by the cam rotor and the inclined plate into nutational motion of the wobble plate. A plurality of pistons are coupled to the wobble plate with each piston being reciprocably fitted within a respective one of the cylinders. A rotation preventing mechanism includes a guide plate disposed at the bottom of the compressor housing, parallel with the drive shaft. A cylindrical block is rotatably disposed within a hole formed in an extended portion of the wobble plate.
    Type: Grant
    Filed: May 15, 1989
    Date of Patent: September 4, 1990
    Assignee: Sanden Corporation
    Inventors: Teruo Higuchi, Kiyoshi Terauchi, Kazuhiko Takai, Sei Kikuchi, Hideto Kobayashi