Patents by Inventor Hidetoshi Aizawa

Hidetoshi Aizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6490182
    Abstract: A semiconductor electric power converter in accordance with the present invention comprises an arm consisting of an IGBT, a capacitor connected between a collector and a gate of said IGBT, and a gate circuit connected to the gate of said IGBT for controlling the switching operation of said IGBT, wherein a plurality of said arms connected in series are connected in parallel and each midpoint of said arms connected in of series is connected to a load. Thereby the impedance between the gate terminal of the IGBT and the gate circuit is decreased when the gate voltage is higher than the gate voltage command value or the impedance between the gate and the emitter of the IGBT is decreased when the collector voltage is high so that an electric charge stored in the gate is rapidly discharged.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: December 3, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Katoh, Hiromitsu Sakai, Shigeta Ueda, Tomomichi Ito, Hidetoshi Aizawa
  • Publication number: 20020131276
    Abstract: A semiconductor electric power converter in accordance with the present invention comprises an arm consisting of an IGBT, a capacitor connected between a collector and a gate of said IGBT, and a gate circuit connected to the gate of said IGBT for controlling the switching operation of said IGBT, wherein a plurality of said arms connected in series are connected in parallel and each midpoint of said arms connected in series is connected to a load. Thereby the impedance between the gate terminal of the IGBT and the gate circuit is decreased when the gate voltage is higher than the gate voltage command value or the impedance between the gate and the emitter of the IGBT is decreased when the collector voltage is high so that an electric charge stored in the gate is rapidly discharged.
    Type: Application
    Filed: October 10, 2001
    Publication date: September 19, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Shuji Katoh, Hiromitsu Sakai, Shigeta Ueda, Tomomichi Ito, Hidetoshi Aizawa
  • Patent number: 6380796
    Abstract: A semiconductor power converting apparatus includes a semiconductor element for controlling a current flowing between a collector and an emitter in response to a gate condition, a driving device connected to the gate, for driving the gate in response to a drive signal entered thereinto, a voltage applying device for applying both a forward bias and a reverse bias to the gate so as to set the emitter of the semiconductor element to a neutral potential, and a voltage dividing device for dividing a voltage appearing between the collector and the emitter of the semiconductor element, in which the drive signal is under OFF state, a voltage produced based upon the divided voltage by the voltage dividing device is applied to the gate, and the gate voltage is controlled in response to the voltage appearing between the collector and the emitter of the semiconductor element, thereby reducing the snubbed loss.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: April 30, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Hiromitsu Sakai, Hidetoshi Aizawa, Shuji Katoh, Ryuji Iyotani, Masahiro Nagasu
  • Patent number: 6305281
    Abstract: A stencil printer includes a document size sensing device for sensing the size of a document and a paper size sensing device for sensing the size of papers. A controller determines the orientation and size of the document and those of the paper on the basis of information output from the two sensing devices. If the document and paper are different in orientation, the controller controls a master making section on the basis of the orientation of the papers for forming a document image in a master in accordance with the orientation of the paper. At the same time, the controller controls a side fence moving device and an end fence moving device such that side fences and an end fence mounted on a paper discharge tray each are located at a particular position matching with the size of the papers. The side fences are movable in the widthwise direction of the paper while the end fence is movable forward and backward in the direction of paper discharge.
    Type: Grant
    Filed: September 22, 1999
    Date of Patent: October 23, 2001
    Assignee: Tohoku Ricoh Co., Ltd.
    Inventor: Hidetoshi Aizawa
  • Publication number: 20010015670
    Abstract: A semiconductor power converting apparatus includes a semiconductor element for controlling a current flowing between a collector and an emitter in response to a gate condition, a driving device connected to the gate, for driving the gate in response to a drive signal entered thereinto, a voltage applying device for applying both a forward bias and a reverse bias to the gate so as to set the emitter of the semiconductor element to a neutral potential, and a voltage dividing device for dividing a voltage appearing between the collector and the emitter of the semiconductor element, in which the drive signal is under OFF state, a voltage produced based upon the divided voltage by the voltage dividing device is applied to the gate, and the gate voltage is controlled in response to the voltage appearing between the collector and the emitter of the semiconductor element, thereby reducing the snubbed loss.
    Type: Application
    Filed: April 20, 2001
    Publication date: August 23, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Hiromitsu Sakai, Hidetoshi Aizawa, Shuji Katoh, Ryuji Iyotani, Masahiro Nagasu
  • Patent number: 6242968
    Abstract: A semiconductor power converting apparatus includes a semiconductor element for controlling a current flowing between a collector and an emitter in response to a gate condition, a driving device connected to the gate, for driving the gate in response to a drive signal entered thereinto, a voltage applying device for applying both a forward bias and a reverse bias to the gate so as to set the emitter of the semiconductor element to a neutral potential, and a voltage dividing device for dividing a voltage appearing between the collector and the emitter of the semiconductor element, in which the drive signal is under OFF state, a voltage produced based upon the divided voltage by the voltage dividing device is applied to the gate, and the gate voltage is controlled in response to the voltage appearing between the collector and the emitter of the semiconductor element, thereby reducing the snubbed loss.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: June 5, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiromitsu Sakai, Hidetoshi Aizawa, Shuji Katoh, Ryuji Iyotani, Masahiro Nagasu
  • Patent number: 6123329
    Abstract: A paper feeder for feeding papers to an image forming apparatus and a paper tray elevation device therefore are disclosed. A first tray is movable up and down with a plurality of papers stacked thereon. A paper feed member feeds the papers from the first tray in a preselected direction of paper feed. A second tray is positioned beside the first tray in substantially the horizontal direction and movable up and down with a plurality of papers stacked thereon. A shifting device shifts the entire paper stack from the second tray to the first tray. A horizontal elevating mechanism elevates the first tray while maintaining it in substantially the horizontal position. An interlocking mechanism at least elevates, when papers of greater in size than the papers to be stacked on the first or second tray are stacked over the first and second trays in a single stack, the second tray in interlocked relation to the elevation of the first tray while maintaining the second tray in substantially the horizontal position.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: September 26, 2000
    Assignee: Tohoku Ricoh Co., Ltd.
    Inventors: Mitsuo Sato, Hidetoshi Aizawa, Kenji Endo, Naoki Ashikaya, Kiyohiko Yakuwa, Masayuki Shima
  • Patent number: 5438347
    Abstract: A master making device incorporated in a stencil printer. The operation for feeding the leading edge of a web or stencil toward a master clamper provided on a print drum is assigned to a platen roller. When the web is to be wrapped around the print drum, the operation for causing the web to form a slack and the operation for applying a tension to the web are implemented only by a tension member which selectively blocks or unblocks a web passageway.
    Type: Grant
    Filed: May 19, 1993
    Date of Patent: August 1, 1995
    Assignee: Ricoh Company, Ltd.
    Inventors: Kamichika Shishido, Hidetoshi Aizawa
  • Patent number: 5424937
    Abstract: An electric power converter comprising a plurality of reactors, a plurality of self quenching type switching elements, the reactors and switching elements being series-connected per one arm, and surge-absorbing snubber circuits connected in parallel to the switching elements respectively, the switching circuits being driven by gate drive circuits connected to respective gates of the switching elements to thereby convert a DC voltage into an AC voltage or convert an AC voltage into a DC voltage. The electric power converter further comprises: an apparatus for recovering energy accumulated on at least one side of the reactors and the snubber circuits and an apparatus for generating a DC source for supplying electric power to each of the gate drive circuits, on the basis of the recovered energy.
    Type: Grant
    Filed: June 9, 1993
    Date of Patent: June 13, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Ryuji Iyotani, Akiteru Ueda, Hiroshi Narita, Mitsuyuki Hombu, Hidetoshi Aizawa
  • Patent number: 4455599
    Abstract: A pulse width modulation inverter loaded with a three-phase AC motor is halted when a logical condition exists that a halt signal has been given and all of pulse width modulation signals applied to either three positive side or three negative side main thyristors in a three-phase bridge connection constituting the inverter are in their high level states.
    Type: Grant
    Filed: April 5, 1982
    Date of Patent: June 19, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Tamura, Hidetoshi Aizawa