Patents by Inventor Hidetoshi Asahara

Hidetoshi Asahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11171216
    Abstract: According to an embodiment, a semiconductor device includes a first semiconductor layer, a first switching element, a second switching element, and a conductor. The conductor is provided at least in part on the first semiconductor layer and located between the first switching element and the second switching element in a first direction.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: November 9, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hidetoshi Asahara, Akihiro Tanaka, Toru Shono
  • Patent number: 10355124
    Abstract: A semiconductor device of an embodiment includes a semiconductor layer having a first plane and a second plane; a first conductivity type first semiconductor region; a first conductivity type second semiconductor region between the first semiconductor region and the first plane; a second conductivity type third semiconductor region and a fourth semiconductor region between the second semiconductor region and the first plane; a first conductivity type fifth semiconductor region between the third semiconductor region and the first plane; a first conductivity type sixth semiconductor region type between the fourth semiconductor region and the first plane; a first conductivity type seventh semiconductor region between the third semiconductor region and the fourth semiconductor region, between the first semiconductor region and the first plane, and having impurity concentration higher than the first conductivity type impurity concentration of the second semiconductor region; first and a second gate electrode; firs
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: July 16, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronics Devices & Storage Corporation
    Inventors: Hidetoshi Asahara, Akihiro Tanaka
  • Patent number: 10325902
    Abstract: A semiconductor device includes a first bidirectional diode of a ring shape surrounding a central region and including a first connection section and a second connection section which is provided to the inner side of the ring shape from the first connection section, a semiconductor element in the central region including a first semiconductor element electrode, a second semiconductor element electrode, and a control electrode, the first semiconductor element electrode electrically connected to the first connection section and the second semiconductor element electrode electrically connected to the control electrode, a first resistor including a first resistor electrode and a second resistor electrode, the first resistor electrode electrically connected to the second connection section and the control electrode, a second bidirectional diode electrically connected to the second resistor electrode and to the second semiconductor element electrode, and a second resistor element electrically connected to the secon
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: June 18, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryuta Arai, Hidetoshi Asahara, Makoto Tsuzuki
  • Publication number: 20190088749
    Abstract: According to an embodiment, a semiconductor device includes a first semiconductor layer, a first switching element, a second switching element, and a conductor. The conductor is provided at least in part on the first semiconductor layer and located between the first switching element and the second switching element in a first direction.
    Type: Application
    Filed: March 5, 2018
    Publication date: March 21, 2019
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hidetoshi ASAHARA, Akihiro TANAKA, Toru SHONO
  • Publication number: 20170263598
    Abstract: A semiconductor device includes a first bidirectional diode of a ring shape surrounding a central region and including a first connection section and a second connection section which is provided to the inner side of the ring shape from the first connection section, a semiconductor element in the central region including a first semiconductor element electrode, a second semiconductor element electrode, and a control electrode, the first semiconductor element electrode electrically connected to the first connection section and the second semiconductor element electrode electrically connected to the control electrode, a first resistor including a first resistor electrode and a second resistor electrode, the first resistor electrode electrically connected to the second connection section and the control electrode, a second bidirectional diode electrically connected to the second resistor electrode and to the second semiconductor element electrode, and a second resistor element electrically connected to the secon
    Type: Application
    Filed: August 25, 2016
    Publication date: September 14, 2017
    Inventors: Ryuta ARAI, Hidetoshi ASAHARA, Makoto TSUZUKI
  • Publication number: 20160027912
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type. The second semiconductor region is adjacent to the first semiconductor region in a first direction. A third semiconductor region of the first conductivity type is adjacent to the second semiconductor region in the first direction. A first electrode is in contact with the first semiconductor region, the second semiconductor region, and the third semiconductor region via a first insulating film. A second electrode is directly adjacent to the third semiconductor region in the first direction. And a third electrode has a plurality of first connection regions that each extend along the first direction from a top surface of the first semiconductor region into the first semiconductor region. The third electrode is in contact with the first semiconductor region and spaced apart from the second electrode.
    Type: Application
    Filed: February 25, 2015
    Publication date: January 28, 2016
    Inventor: Hidetoshi ASAHARA
  • Patent number: 9048215
    Abstract: A semiconductor device includes a first layer of a first-type, a second layer of a second-type formed on the first layer, a third layer of the first type formed on the second layer, a first electrode connected to the second and third layers, a second electrode connected to the first layer, a third electrode embedded in a trench formed through the third and second layers and into the first layer, a fourth electrode embedded in the trench below the third electrode, and an insulating layer formed in the trench around the fourth electrode. The first layer includes a first region that is in contact with the insulating layer and at which a concentration of the first-type dopant is lower than the concentration at a second region that is formed around the first region.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: June 2, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi Asahara
  • Publication number: 20150076592
    Abstract: A method of manufacturing a semiconductor device includes: forming a trench on a semiconductor layer of a first conductive type; forming a first insulation film which covers an inner surface of the trench; forming a first conductive material on the first insulation film; etching the first conductive material and then the first insulation film such that the semiconductor layer is exposed on an inner surface of an upper portion of the trench and an upper end portion of the first conductive material is positioned above an upper end portion of the first insulation film; re-etching the first conductive material; forming a second insulation film which covers the semiconductor layer exposed on the inner surface of the upper portion of the trench and the first conductive material; and forming a second conductive material on the first insulation film and the second insulation film.
    Type: Application
    Filed: February 26, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi ASAHARA
  • Publication number: 20140320193
    Abstract: A semiconductor device includes a first layer of a first-type, a second layer of a second-type formed on the first layer, a third layer of the first type formed on the second layer, a first electrode connected to the second and third layers, a second electrode connected to the first layer, a third electrode embedded in a trench formed through the third and second layers and into the first layer, a fourth electrode embedded in the trench below the third electrode, and an insulating layer formed in the trench around the fourth electrode. The first layer includes a first region that is in contact with the insulating layer and at which a concentration of the first-type dopant is lower than the concentration at a second region that is formed around the first region.
    Type: Application
    Filed: August 29, 2013
    Publication date: October 30, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi ASAHARA
  • Publication number: 20120241761
    Abstract: According to an embodiment, a semiconductor device includes a first semiconductor layer of a first conductive type, a first main electrode provided on a first major surface side of the first semiconductor layer, and a second main electrode provided on a second major surface side of the first semiconductor layer. A pair of first control electrodes is provided within a trench provided from the first major surface side to the second major surface in the first semiconductor layer; and the first control electrodes are provided separately from each other in a direction parallel to the first major surface. Each of the first control electrodes faces an inner face of the trench via a first insulating film. A second control electrode is provided between the first control electrodes and a bottom face of the trench, and faces the inner face of the trench via a second insulating film.
    Type: Application
    Filed: September 21, 2011
    Publication date: September 27, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi ASAHARA
  • Patent number: 8183606
    Abstract: A semiconductor device comprises an insulated gate field effect transistor and a protection diode. The insulated gate field effect transistor has a gate electrode formed on a gate insulating film, a source and a drain. The source and the drain are formed in a first area of a semiconductor substrate. A first silicon oxide film is formed on a second area of the semiconductor substrate adjacent to the first area. The first silicon oxide film is thicker than the gate insulating film and contains larger amount of impurities than the gate insulating film. A poly-silicon layer is formed on the first silicon oxide film. The protection diode has a plurality of PN-junctions formed in the poly-silicon layer. The protection diode is connected between the gate electrode and the source so as to prevent breakdown of the gate insulating film.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: May 22, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuta Arai, Hidetoshi Asahara, Kouji Murakami, Keiko Kawamura
  • Publication number: 20100127330
    Abstract: A semiconductor device comprises an insulated gate field effect transistor and a protection diode. The insulated gate field effect transistor has a gate electrode formed on a gate insulating film, a source and a drain. The source and the drain are formed in a first area of a semiconductor substrate. A first silicon oxide film is formed on a second area of the semiconductor substrate adjacent to the first area. The first silicon oxide film is thicker than the gate insulating film and contains larger amount of impurities than the gate insulating film. A poly-silicon layer is formed on the first silicon oxide film. The protection diode has a plurality of PN-junctions formed in the poly-silicon layer. The protection diode is connected between the gate electrode and the source so as to prevent breakdown of the gate insulating film.
    Type: Application
    Filed: November 25, 2009
    Publication date: May 27, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ryuta ARAI, Hidetoshi ASAHARA, Kouji MURAKAMI, Keiko KAWAMURA
  • Patent number: 4036282
    Abstract: The surface quality of ingots may be improved by bottom-pouring molten metal into an ingot mould wherein there is located in the ingot mould, prior to the commencement of pouring, a multi-layered board having a first layer which is a preformed slab comprising an anti-piping composition including an exothermic material and a second layer adjacent the first layer which is a preformed slab comprising a fluxing agent, a fibrous material and a binder, the second layer having a central cavity therein filled with a preformed refractory slab comprising a refractory material, a fibrous material and a binder, the slabs being arranged such that the refractory slab is enclosed within the board, and the board being located in the mould with the first layer uppermost. The board acts as both a mould additive and as an anti-piping compound.
    Type: Grant
    Filed: September 2, 1975
    Date of Patent: July 19, 1977
    Assignee: Foseco International Limited
    Inventor: Hidetoshi Asahara