Patents by Inventor Hidetoshi Matsumoto

Hidetoshi Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6822517
    Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: November 23, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
  • Publication number: 20040212438
    Abstract: A radio frequency power amplifier module that brings sufficient attenuation to a radio frequency signal in a bias supply line connecting a bias control part and a radio frequency power amplifier part without increasing module substrate area is aimed. At least one bonding pad 106 having a capacitance component to a ground and stitch structure inductances 108, 109 composed of a bonding wire 105 provided via the bonding pad are provided in the bias supply line connecting the bias control part and the radio frequency power amplifier part.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 28, 2004
    Inventors: Masami Ohnishi, Tomonori Tanoue, Hidetoshi Matsumoto
  • Publication number: 20040145417
    Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.
    Type: Application
    Filed: January 9, 2004
    Publication date: July 29, 2004
    Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
  • Patent number: 6710649
    Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: March 23, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
  • Publication number: 20030218185
    Abstract: A first aspect of the invention is to realize a power amplifier having high power adding efficiency and high power gain at low cost. For that purpose, in a semiconductor device using an emitter top heterojunction bipolar transistor formed above a semiconductor substrate and having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. In this way, as a result of enabling to reduce base/collector junction capacitance per unit emitter area without using a collector top structure having complicated fabricating steps, a semiconductor device having high power adding efficiency and high-power gain and suitable for a power amplifier can be realized.
    Type: Application
    Filed: April 9, 2003
    Publication date: November 27, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Isao Ohbu, Tomonori Tanoue, Chushiro Kusano, Yasunari Umemoto, Atsushi Kurokawa, Kazuhiro Mochizuki, Masami Ohnishi, Hidetoshi Matsumoto
  • Publication number: 20030102924
    Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.
    Type: Application
    Filed: November 21, 2002
    Publication date: June 5, 2003
    Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
  • Publication number: 20030025555
    Abstract: The present invention provides a radio frequency power amplifier which may not introduce radio frequency loss during switching power amplifier units between high and low output power levels. By connecting a first-stage matching network M12 and first-stage matching network M13 to respective output nodes of a power amplifier unit A11 and power amplifier unit A12 that either one operate by switching, connecting the output nodes of the first-stage matching network M12 and M13 in parallel, connecting a last-stage matching network M11 between the junction of M12 and M13 and the output terminal OUT, the first-stage matching networks M12, M13, and last-stage matching network M11 are formed, for both power amplifier units A11 and A12, so that impedance matching is established between the output terminal OUT and the power amplifier unit in operation when one unit is in operation the other is in stop of operation.
    Type: Application
    Filed: June 5, 2002
    Publication date: February 6, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Masami Ohnishi, Hidetoshi Matsumoto, Tomonori Tanoue, Osamu Kagaya, Kenji Sekine
  • Patent number: 6162569
    Abstract: A method for manufacturing a fine pattern includes steps of forming a master substrate having an electrode layer patterned to a predetermined shape, forming peel layers made of a conductive water-repellent thin film on the master substrate, forming the fine pattern made of the electrodeposit resin on the peel layers, impregnating the electrodeposit resin with water, and stripping the fine pattern off the master substrate and transferring the fine pattern on a bonding layer of the media substrate. A color filter and a shading pattern filter are manufactured by the method for manufacturing the fine pattern. The color LCD element includes plastic film substrates, a transparent pixel electrode, a liquid crystal material, and color filters. The color filters are pasted on the plastic film with a bonding film laid therebetween.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: December 19, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kouji Nakashima, Keita Ihara, Hidetoshi Matsumoto, Takahiro Oomori
  • Patent number: 5966273
    Abstract: In a magnetoresistive thin film head including a magnetoresistive element, lead layers for supplying a sense current to the magnetoresistive element and an insulating layer provided in the vicinity of the magnetoresistive element, the insulating layer is formed of a material which has an electrical resistivity greater than 1.times.10.sup.4 .OMEGA.cm and a thermal conductivity greater than 100 W/(mK). The insulating layer may be formed of silicon, diamond-like carbon or the like so as to have an electrical resistivity and a thermal conductivity within the ranges defined above.
    Type: Grant
    Filed: January 26, 1994
    Date of Patent: October 12, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hidetoshi Matsumoto, Hiroshi Tomiyasu
  • Patent number: 5916735
    Abstract: A method for manufacturing a fine pattern is provided which method makes it possible to well reproducibly and completely strip and transfer the fine pattern, repetitively use a master substrate, and simply form a high-definition and high-density fine pattern with good massproductivity. Further, a color filter and a shading pattern filter are implemented by the fine pattern. A color LCD element with the color filter is provided which enables to output a well color-reproducibly high-quality image with no color or brightness evenness. Moreover, a color LCD element is provided which enables to continuously output a coloring function for a certain length of time after light from a light source or ambient light disappears and form a brighter and more vivid image.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: June 29, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kouji Nakashima, Keita Ihara, Hidetoshi Matsumoto, Takahiro Oomori
  • Patent number: 5730828
    Abstract: This invention provides a method which is capable of strong and rapid-curing adhesion of various kinds of components including plastic components. Especially, this method can be industrially utilized with high efficiency in in-line adhesion assembly of various kinds of components, for example, plastic components, such as adhesion assembly of optical disks by adhering plastic plates together. Namely, this method comprises the steps of forming a face for effecting curing acceleration for an anaerobic curing adhesive on one or both of the adhering surfaces of the components to be adhered, coating the anaerobic curing adhesive on one or both of the adhering surfaces of the components, and laying one adhering surface on the other adhering surface of the components.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: March 24, 1998
    Assignee: Cemedine Co., Ltd.
    Inventors: Toshio Somemiya, Hidetoshi Matsumoto
  • Patent number: 5701019
    Abstract: A semiconductor device (e.g., hetero-junction field-effect transistor) which has decreased capacitance between the gate and drain, and which has decreased source resistance, is provided. Structure in which a contact layer 6 comes in contact with the side surfaces of a channel layer 3 but does not come in contact with the side surfaces of a barrier layer 4 enables capacitance between the gate and drain to be decreased. This capacitance can be decreased down to 1.5 pF per 10 .mu.m of the width.
    Type: Grant
    Filed: August 21, 1995
    Date of Patent: December 23, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hidetoshi Matsumoto, Masamitsu Yazawa, Kenji Hiruma
  • Patent number: 5571321
    Abstract: This disclosure herein pertains to a method for producing a GaP epitaxial wafer used for fabrication of light emitting diodes having higher brightness than light emitting diodes fabricated from a GaP epitaxial wafer produced by a conventional method have. The method comprises the steps of: preparing a GaP layered substrate 15 with one or more GaP layers on a GaP single crystal substrate 10 in the first series of liquid phase epitaxial growth; obtaining a layered GaP substrate 15a by eliminating surface irregularities of said GaP layered substrate 15 by mechano-chemical polishing to make the surface to be planar; and then forming a GaP light emitting layer composite 19 on said layered GaP substrate 15a in the second series of liquid phase epitaxial growth.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: November 5, 1996
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Munehisa Yanagisawa, Yuuki Tamura, Susumu Arisaka, Hidetoshi Matsumoto
  • Patent number: 5407858
    Abstract: To provide a GaP red light emitting element substrate which a large amount of oxygen is doped in the p-type GaP layer, and which very few Ga.sub.2 O.sub.3 precipitates develop on and/or in p-type GaP layer, and methods of manufacturing said substrate. After the n-type GaP layer 2 is grown on the n-type GaP single crystal substrate 1, when forming the p-type GaP layer 3 doped with Zn and O, on said n-type GaP layer 2 by means of the liquid phase epitaxial growth method, the p-type GaP layer 3 is grown by using a Ga solution with a high concentration of oxygen, and said Ga solution is removed from the substrate 1 to complete the growth when the temperature is lowered to a prescribed temperature of 980.degree. C. or higher. When the temperature has reached the prescribed temperature of 980.degree. C.
    Type: Grant
    Filed: April 12, 1994
    Date of Patent: April 18, 1995
    Assignee: Shin-Etsu Handotai Co. Ltd.
    Inventors: Munehisa Yanagisawa, Yuuki Tamura, Susumu Arisaka, Hidetoshi Matsumoto
  • Patent number: 5362972
    Abstract: A field effect transistor and a ballistic transistor using semiconductor whiskers each having a desired diameter and formed at s desired location, a semiconductor vacuum microelectronic device using the same as electron emitting materials, a light emitting device using the same as quantum wires and the like are disclosed.
    Type: Grant
    Filed: April 17, 1991
    Date of Patent: November 8, 1994
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corporation
    Inventors: Masamitsu Yazawa, Kenji Hiruma, Toshio Katsuyama, Nobutaka Futigami, Hidetoshi Matsumoto, Hiroshi Kakibayashi, Masanari Koguchi, Gerard P. Morgan, Kensuke Ogawa
  • Patent number: 5351128
    Abstract: A field-effect transistor or a bipolar transistor may be provided in which the contact resistance between a channel layer or base layer and a contact layer are reduced. For example, an InGaAs buffer layer may be formed on the substrate side of an InGaAs channel layer of a field-effect transistor and by the bypassing effect that carriers pass through this InGaAs buffer layer, the InGaAs channel layer comes in contact with the contact layer with a low resistance. The contact resistance between the InGaAs channel layer and the contact layer can be reduced to 10 ohm per a width of 10.mu.m, and as a result, the value of transconductance factor K of a field-effect transistor can be increased in 14 mA/V.sup.2 per a width of 10.mu.m.
    Type: Grant
    Filed: July 27, 1992
    Date of Patent: September 27, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Shigeo Goto, Hidetoshi Matsumoto, Masamitsu Yazawa, Yasunari Umemoto, Yoko Uchida, Kenji Hiruma
  • Patent number: 5137784
    Abstract: A magnetic record medium comprises(A) a nonmagnetic substrate,(B) a layer consisting essentially of a ferromagnetic metal on at least one side of the substrate,(C) a layer containing carbon on the layer of (B),(D) a layer comprising a primary or secondary organic amine containing at least one substituent having a fluorinated hydrocarbon group at the end of the substituent on the layer of (C), and(E) a layer comprising at least one lubricant having a plurality or fully fluorinated hydrocarbon group on one end of the molecule and a functional group selected from the group consisting of --OH, --SH, --COOH, --COSH and --CONH.sub.2 on the other end of the molecule on the layer of (D).
    Type: Grant
    Filed: March 8, 1990
    Date of Patent: August 11, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Suzuki, Yoshiaki Kai, Mikio Murai, Kiyoshi Takahashi, Takatoshi Minoda, Hidetoshi Matsumoto
  • Patent number: 5082363
    Abstract: In a distance measuring apparatus for optically detecting a distance to an object by using a triangulation method, two signals which are obtained from a position sensitive device are added and it is detected that the result of the addition has exceeded a predetermined threshold level. On the other hand, it is assumed that a signal waveform to drive a light emitting device is a signal whose level increases with an elapse of time. When the addition result exceeds the threshold level, the level of the drive signal is held constant. At this time, by dividing a signal obtained from the position sensitive device by the signal indicative of the addition result, a signal relating to the distance to the object is obtained.
    Type: Grant
    Filed: December 12, 1990
    Date of Patent: January 21, 1992
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Hiroaki Nakanishi, Hidehiro Fukumoto, Kuniharu Shibata, Hidetoshi Matsumoto
  • Patent number: 5063355
    Abstract: The timer circuit according to this invention has a first circuit block to which a source voltage is applied at all times and which includes a memory circuit which is set when an input signal is applied thereto. The timer circuit also has a reference voltage circuit which outputs a reference voltage when the memory circuit is set and which ceases to output the reference voltage when the memory circuit is reset, an oscillation circuit which outputs a train of pulse signals in a predetermined cycle, and a counter which begins to count the train of pulse signals after the reference voltage is outputted. The timer circuit further includes a second circuit block which includes a signal processing circuit which outputs a timer signal while the counter is counting. A reference voltage is supplied from the reference voltage circuit to the components of the second circuit block while the memory circuit remains set and the memory circuit is reset in response to a time-out signal from the counter.
    Type: Grant
    Filed: March 9, 1990
    Date of Patent: November 5, 1991
    Assignee: Omron Corporation
    Inventors: Kazuo Sasaki, Hidetoshi Matsumoto, Taneji Ohoka
  • Patent number: 5029300
    Abstract: A sensor according to this invention comprises an oscillation circuit including an LC resonant circuit, wherein a detection signal is prohibited upon arrival of an external radio wave.
    Type: Grant
    Filed: June 21, 1990
    Date of Patent: July 2, 1991
    Assignee: Omrom Corporation
    Inventors: Keisuke Ishibashi, Hidetoshi Matsumoto