Patents by Inventor Hidetoshi Yugawa

Hidetoshi Yugawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210227691
    Abstract: A wiring board of the present disclosure comprises an insulating layer, a first conductor layer located on the surface of the insulating layer and containing any one of nickel and chromium, a metal belonging to group of the periodic table; or a metal belonging to group of the periodic table, a second conductor layer located inside the outer circumferential edge on the first conductor layer and containing copper, a third conductor layer located on the surface of the insulating layer in a state of covering the first conductor layer and the second conductor layer and containing nickel, and a fourth conductor layer located in a state of covering the third conductor layer and containing gold. The third conductor layer has an overhanging part extending outward from the outer circumferential edge of the first conductor layer, and the fourth conductor layer is located between the overhanging part and the insulating layer.
    Type: Application
    Filed: June 21, 2019
    Publication date: July 22, 2021
    Applicant: KYOCERA Corporation
    Inventor: Hidetoshi YUGAWA
  • Patent number: 10779408
    Abstract: The printed wiring board of the present disclosure includes: a plurality of insulating layers laminated in a thickness direction; a plurality of wiring conductors respectively correspondingly positioned between the plurality of insulating layers; a through hole penetrating the plurality of insulating layers and the plurality of wiring conductors in the thickness direction; and a through-hole conductor positioned on a wall surface of the through hole; each of the plurality of wiring conductors has a first surface facing the through hole, each of the plurality of insulating layers has a second surface facing the through hole, and the first surface is farther away from a central axis penetrating the through hole in the thickness direction than the second surface.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: September 15, 2020
    Assignee: KYOCERA Corporation
    Inventors: Takashi Ishioka, Hidetoshi Yugawa
  • Publication number: 20200120799
    Abstract: The printed wiring board of the present disclosure includes: a plurality of insulating layers laminated in a thickness direction; a plurality of wiring conductors respectively correspondingly positioned between the plurality of insulating layers; a through hole penetrating the plurality of insulating layers and the plurality of wiring conductors in the thickness direction; and a through-hole conductor positioned on a wall surface of the through hole; each of the plurality of wiring conductors has a first surface facing the through hole, each of the plurality of insulating layers has a second surface facing the through hole, and the first surface is farther away from a central axis penetrating the through hole in the thickness direction than the second surface.
    Type: Application
    Filed: September 19, 2019
    Publication date: April 16, 2020
    Applicant: KYOCERA Corporation
    Inventors: Takashi ISHIOKA, Hidetoshi YUGAWA
  • Patent number: 10602622
    Abstract: A wiring board includes a first insulating layer including a surface having unevenness, a second insulating layer including a surface having unevenness, laminated on the first insulating layer, and made of the same insulating material as that of the first insulating layer, insulating particles contained in the first and second insulating layers at rate of 40 to 80 wt %, a first wiring conductor on a first underlying metal layer surface, and a second wiring conductor on a second underlying metal layer surface. A second level difference of the unevenness in a surface region of the second insulating layer under the second wiring conductor is smaller than a first level difference of the unevenness in a surface region of the first insulating layer under the first wiring conductor, and the second level difference is not more than ? of an average particle size of the insulating particles.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: March 24, 2020
    Assignee: KYOCERA Corporation
    Inventors: Masaaki Harazono, Takayuki Umemoto, Hidetoshi Yugawa
  • Publication number: 20200035575
    Abstract: A wiring board of the present disclosure includes: a first insulating layer including a surface; a second insulating layer including un upper surface and a lower surface and locating above the surface of the first insulating layer; a wiring conductor layer formed on the surface of the first insulating layer, includes a via land; and a via hole conductor penetrating from the upper surface to the lower surface of the second insulating layer. The via hole conductor includes a via bottom being in contact with the via land. Crystal grains in the via bottom are smaller than crystal grains in the via land.
    Type: Application
    Filed: July 25, 2019
    Publication date: January 30, 2020
    Applicant: KYOCERA Corporation
    Inventors: Tsuyoshi SUNADA, Hidetoshi YUGAWA
  • Publication number: 20190132962
    Abstract: A wiring board includes a first insulating layer including a surface having unevenness, a second insulating layer including a surface having unevenness, laminated on the first insulating layer, and made of the same insulating material as that of the first insulating layer, insulating particles contained in the first and second insulating layers at rate of 40 to 80 wt %, a first wiring conductor on a first underlying metal layer surface, and a second wiring conductor on a second underlying metal layer surface. A second level difference of the unevenness in a surface region of the second insulating layer under the second wiring conductor is smaller than a first level difference of the unevenness in a surface region of the first insulating layer under the first wiring conductor, and the second level difference is not more than ? of an average particle size of the insulating particles.
    Type: Application
    Filed: September 13, 2018
    Publication date: May 2, 2019
    Applicant: KYOCERA Corporation
    Inventors: Masaaki Harazono, Takayuki Umemoto, Hidetoshi Yugawa
  • Patent number: 9426887
    Abstract: A wiring board according to the present invention includes an insulating board; a first pad provided inwardly from a surface of the insulating board and electrically connected to an electrode of an electronic component; a second pad provided on the surface of the insulating board and electrically connected to a lead terminal. The first pad and the second pad include a first layer region made of copper and a second layer region arranged on the first layer region and made of nickel, and a thickness of the second layer region of the second pad is larger than a thickness of the second layer region of the first pad.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: August 23, 2016
    Assignee: Kyocera Corporation
    Inventors: Yoshihiro Hosoi, Takayuki Taguchi, Hidetoshi Yugawa
  • Patent number: 9237649
    Abstract: A wiring board 10 includes a lower wiring conductor 1, an upper insulating layer 2 laminated on the lower wiring conductor 1 and having a via hole 5 where a bottom surface is the lower wiring conductor 1, and a via conductor 3 connected to the lower wiring conductor 1 and filling the via hole 5; and the upper insulating layer 2 includes a first resin layer 2a and a second resin layer 2b sequentially laminated on the lower wiring conductor 1, the via hole 5 has an annular groove 5a over a whole circumference of the inner wall in a boundary between both resin layers 2a and 2b, and the via conductor 3 fills the groove 5.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: January 12, 2016
    Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Hidetoshi Yugawa
  • Publication number: 20140353021
    Abstract: A wiring board 10 includes a lower wiring conductor 1, an upper insulating layer 2 laminated on the lower wiring conductor 1 and having a via hole 5 where a bottom surface is the lower wiring conductor 1, and a via conductor 3 connected to the lower wiring conductor 1 and filling the via hole 5; and the upper insulating layer 2 includes a first resin layer 2a and a second resin layer 2b sequentially laminated on the lower wiring conductor 1, the via hole 5 has an annular groove 5a over a whole circumference of the inner wall in a boundary between both resin layers 2a and 2b, and the via conductor 3 fills the groove 5.
    Type: Application
    Filed: May 23, 2014
    Publication date: December 4, 2014
    Applicant: KYOCERA SLC TECHNOLOGIES CORPORATION
    Inventor: Hidetoshi YUGAWA
  • Patent number: 8853557
    Abstract: A circuit board provided with a first resin layer and with a first conductive layer formed on the first resin layer. The first conductive layer has a metal carbide layer containing a carbide of a transition metal selected from Group IV, Group V, or Group VI in the Periodic Table and bonded to the first resin layer. The first resin layer has a first region to which the metal carbide layer is bonded and a second region located in an inner portion of the first resin layer from the first region. The first region has a larger ratio of number of atoms of nitrogen relative to number of atoms of carbon than in the second region.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: October 7, 2014
    Assignee: Kyocera Corporation
    Inventor: Hidetoshi Yugawa
  • Publication number: 20140000946
    Abstract: A wiring board according to the present invention includes an insulating board; a first pad provided inwardly from a surface of the insulating board and electrically connected to an electrode of an electronic component; a second pad provided on the surface of the insulating board and electrically connected to a lead terminal. The first pad and the second pad include a first layer region made of copper and a second layer region arranged on the first layer region and made of nickel, and a thickness of the second layer region of the second pad is larger than a thickness of the second layer region of the first pad.
    Type: Application
    Filed: June 26, 2013
    Publication date: January 2, 2014
    Inventors: Yoshihiro HOSOI, Takayuki TAGUCHI, Hidetoshi YUGAWA
  • Patent number: 8513535
    Abstract: A circuit board includes an insulating layer and a conductive layer formed on the insulating layer. The insulating layer contains a resin with high heat resistance. The conductive layer includes a metal carbide layer bonded to the insulating layer and containing a carbide of a first metal in group IV, V, or VI of the periodic table, and a first metal layer bonded to the metal carbide layer and containing the first metal.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: August 20, 2013
    Assignee: Kyocera Corporation
    Inventor: Hidetoshi Yugawa
  • Publication number: 20110100691
    Abstract: A circuit board includes an insulating layer and a conductive layer formed on the insulating layer. The insulating layer contains a resin with high heat resistance. The conductive layer includes a metal carbide layer bonded to the insulating layer and containing a carbide of a first metal in group IV, V, or VI of the periodic table, and a first metal layer bonded to the metal carbide layer and containing the first metal.
    Type: Application
    Filed: October 30, 2009
    Publication date: May 5, 2011
    Applicant: KYOCERA CORPORATION
    Inventor: Hidetoshi YUGAWA
  • Publication number: 20110083883
    Abstract: A circuit board provided with a first resin layer and with a first conductive layer formed on the first resin layer. The first conductive layer has a metal carbide layer containing a carbide of a transition metal selected from Group IV, Group V, or Group VI in the Periodic Table and bonded to the first resin layer. The first resin layer has a first region to which the metal carbide layer is bonded and a second region located in an inner portion of the first resin layer from the first region. The first region has a larger ratio of number of atoms of nitrogen relative to number of atoms of carbon than in the second region.
    Type: Application
    Filed: September 29, 2010
    Publication date: April 14, 2011
    Applicant: KYOCERA CORPORATION
    Inventor: Hidetoshi Yugawa