Patents by Inventor Hidetsugu Wada

Hidetsugu Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4044344
    Abstract: In a MIS dynamic memory, information is written in the memory cell at a predetermined address, the access to other plural addresses is made for a fixed time period under such a condition that the memory cell of the predetermined address is not refreshed, and the stored information is thereafter read out of the memory cell of the predetermined address. The level of the read information is compared with a predetermined threshold value, thereby determining the information hold time of the memory cell.
    Type: Grant
    Filed: May 12, 1976
    Date of Patent: August 23, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Hidetsugu Wada, Yoichi Asano, Yoshikazu Suzumura