Patents by Inventor Hideya Yagoura
Hideya Yagoura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5412157Abstract: A semiconductor device includes a molded resin encapsulating a semiconductor chip, outer leads extending from the molded resin and having free ends, and a resin layer connecting and supporting the outer leads along the entire length of the outer leads. The resin layer may have an activating ability for soldering. A method for manufacturing a semiconductor device includes preparing a semiconductor device having a molded resin and a plurality of outer lead portions extending from the molded resin and connected to a lead frame, forming a resin film on and between the outer lead portions; cutting the lead portions to provide cantilevered outer leads having free ends; lead-forming the outer leads with lead-forming dies while heating the resin film to form a resin layer connecting and supporting the outer leads along the entire lengths of the outer leads, and taking the semiconductor device out of the lead-forming dies after the resin layer has been cured.Type: GrantFiled: July 16, 1993Date of Patent: May 2, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hideya Yagoura, Noriaki Higuchi, Haruo Shimamoto
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Patent number: 5359203Abstract: A laser OLB apparatus includes an XY table; a bonding laser source for irradiating bonding parts between bonding lands of a substrate and leads of a semiconductor device located on the substrate thereby bonding the bonding parts; a recognition device for recognizing whether the leads of the semiconductor device are free of flexure and deviation; and a control unit for controlling the XY table and the laser source so that bonding is conducted only when the recognition device has recognized that the leads are free of flexure and deviation.Type: GrantFiled: June 2, 1993Date of Patent: October 25, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Mitsuya Hashii, Haruo Shimamoto, Hideya Yagoura
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Patent number: 5157478Abstract: A packaged semiconductor device includes an insulating film having an opening, a semiconductor chip disposed in the opening of the insulating film and having a plurality of electrodes, a plurality of leads, each having one end connected to a corresponding electrode, the plurality of leads being supported on the insulating film, a heat radiator disposed opposite and spaced from the semiconductor chip, and a resin package body encapsulating the semiconductor chip and part of the heat radiator, leaving a surface of the heat radiator externally exposed and the second ends of the plurality of leads extending outwardly from the package.Type: GrantFiled: December 18, 1991Date of Patent: October 20, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tetsuya Ueda, Haruo Shimamoto, Yasuhiro Teraoka, Hideya Yagoura, Hiroshi Seki
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Patent number: 5064706Abstract: A carrier tape includes a film having an opening for receiving a semiconductor chip to be resin-molded by a pair of mold halves and outer lead holes formed around the periphery of the opening, a plurality of leads for mounting the semiconductor chip on the film, and a resin running portion cooperating, when the mold halves are closed with the film held between the mold halves, with a gate formed on a parting surface of one of the mold halves to define a resin running path which extends from a portion of the film outside the outer lead holes to the opening for guiding a molten resin into the mold halves while preventing the resin from entering the outer lead holes.Type: GrantFiled: December 8, 1988Date of Patent: November 12, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tetsuya Ueda, Haruo Shimamoto, Hideya Yagoura, Hiroshi Seki, Yasuhiro Teraoka
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Patent number: 5055912Abstract: A semiconductor device mounted on a substrate. Outer leads, partially resin-molded, have a greater height above the mounting surface than that of a conventional device. Specifically, each lead projecting from the molded resin has a bent portion which is convex in the direction opposite to the mounting surface, and the length of the lead beyond the bent portion is greater than the distance from the lead portion adjacent to the resin portion of the lead to the mounting surface. The long leads improve reliability during, e.g., heat cycle, tests. In another embodiment, outer leads, partially resin-molded, have reverse J-shaped bent portions, each with a distal end positioned away from the resin. When the bent portions serve as soldering portions, the soldering condition can be easily checked.Type: GrantFiled: September 4, 1990Date of Patent: October 8, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yasuhiro Murasawa, Hitoshi Toda, Hiroshi Sawano, Hideya Yagoura
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Patent number: 4945391Abstract: A semiconductor device includes a laser diode and a light receiving element arranged on a common surface of a substrate and a monitor laser beam from the laser diode is reflected by a reflecting plate to the light receiving element. With the arrangement of the laser diode and the light receiving element on the same surface of the substrate, die-bondings and wire-bondings for the laser diode and the light receiving element can be performed in a single step. Thermal stress due to heat generation of the laser diode is minimized by a use of a sub-mount between the laser diode and the substrate.Type: GrantFiled: March 15, 1989Date of Patent: July 31, 1990Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hideya Yagoura, Isamu Yamamoto
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Patent number: 4839713Abstract: A package structure comprising a metallic cap having a bottom wall to which the bottom surface of the semiconductor chip is electrically and mechanically connected, a side wall extending from said bottom wall and surrounding the semiconductor chip, and a flange extending outwardly from said side wall substantially parallel to said bottom wall, said flange supporting the lead conductors thereon through an electrically insulating material. The electrical connection means is disposed between the metallic cap flange and the lead conductor for establishing an electrical connection therebetween. The electrical connection means may comprise an electrically conductive projection formed on the flange of the metal cap, extending through a notch in the insulating material and electrically connected to the lead conductor.Type: GrantFiled: February 17, 1988Date of Patent: June 13, 1989Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yasuhiro Teraoka, Tetsuya Ueda, Hideya Yagoura, Haruo Shimamoto, Shigeyuki Nango, Toshinobu Banjo, Hiroshi Seki
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Patent number: 4826068Abstract: A bonding device for effecting outer lead bonding is disclosed which comprises a bonding stage, a pair of bonding tools, and lead supporting means. The lead supporting means may take the form of a pair of projections formed on the upper surface of the bonding stage at horizontal locations thereof which are situated below the lead supporting portion of the tape carrier. Alternatively, the lead supporting means may take the form of a pair of horizontally extending rectangular columns which are retractably inserted into the above specified horizontal locations of the upper surface of the bonding stage. Thus, leads can be formed simultaneously with the outer lead bonding. The bonding stage may be divided into upper and lower stages, and the projections may be formed on the upper surface of the lower stage to extend through holes formed in the upper stage. This structure makes the projections retractable.Type: GrantFiled: June 22, 1988Date of Patent: May 2, 1989Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hideya Yagoura, Haruo Shimamoto