Abstract: A semiconductor device includes: a plurality of semiconductor chips each including a first main electrode on a top surfaces and including a second main electrode and a control electrode on a bottom surface; a first common main electrode connected to the first main electrodes; a printed board including a control wiring part and a main wiring part provided on a bottom surface of an insulating layer, and a common control electrode and a second common main electrode provided on a top surface of the insulating layer and electrically connected to the control wiring part and the main wiring part; projection electrodes bonding the control electrodes to the control wiring part; projection electrodes bonding the second main electrodes to the main wiring part; and a sealing member sealing the semiconductor chips and exposing the first common main electrode, the common control electrode, and the second common main electrode.

Abstract: A semiconductor device includes: a plurality of semiconductor chips each including a first main electrode on a top surfaces and including a second main electrode and a control electrode on a bottom surface; a first common main electrode connected to the first main electrodes; a printed board including a control wiring part and a main wiring part provided on a bottom surface of an insulating layer, and a common control electrode and a second common main electrode provided on a top surface of the insulating layer and electrically connected to the control wiring part and the main wiring part; projection electrodes bonding the control electrodes to the control wiring part; projection electrodes bonding the second main electrodes to the main wiring part; and a sealing member sealing the semiconductor chips and exposing the first common main electrode, the common control electrode, and the second common main electrode.

Abstract: A semiconductor device includes circuit substrates 3 and 9 including circuit pattern layers 3c/9b, a semiconductor element 5 mounted to the circuit pattern layer 3c, a connecting pin 7 connecting the semiconductor element 5 to the circuit pattern layer 9b, a pin-shaped terminal 17 connected to the circuit pattern layer 9b, a sealing member 2 sealing the circuit substrates 3 and 9, the semiconductor element 5, and the connecting pin 7, and an external terminal 27 including a flat plate portion 27s and an extending portion 27t bent from the flat plate portion 27s and extends away from the circuit substrate 9, in which the flat plate portion 27s is connected to the pin-shaped terminal 17 and arranged in parallel with the circuit pattern layer 9b, and the extending portion 27t is provided in a range of a width in a transverse direction of the sealing member 2.

Abstract: A semiconductor device implements upper and lower arms for three phases by a plurality of semiconductor chips, an insulated circuit board, and a printed board, the printed board includes: a plurality of upper relay pattern layers arranged on one main surface of an insulating layer; an upper common pattern layer arranged on the one main surface of the insulating layer; a plurality of lower relay pattern layers arranged to be opposed to the upper relay pattern layers on another main surface opposite to the one main surface of the insulating layer; and a lower common pattern layer arranged to be opposed to the upper common pattern layer on the other main surface of the insulating layer, and control wires electrically connected to the semiconductor chips are partly provided in regions between the upper relay pattern layers and the upper common pattern layer.

Abstract: The semiconductor device includes, on the cooling substrate, first main terminal, second main terminal, third main terminal, and fourth main terminal, each having a polygonal-shape. The first external-connection face on upper surface of the first main terminal is connected to positive electrode, and the fourth external-connection face on upper surface of the fourth main terminal is connected to negative electrode. First semiconductor element electrically connected between side surface of the first main terminal and side surface of the second main terminal, and second semiconductor element electrically connected between side surface of the third main terminal and side surface of the fourth main terminal are provided. The second main terminal and the third main terminal are disposed adjacent to each other while being separated, and the first main terminal and the fourth main terminal are disposed adjacent to each other while being separated.

Abstract: A semiconductor device includes: an insulated circuit board including metal layers having recesses, and an insulating board having an upper surface on which the metal layers are arranged; external terminals having bottom ends with a width narrower than the width of openings of the recesses, these bottom ends being inserted into the recesses; a printed circuit board that directly supports the external terminals; and first bonding material that is arranged inside the recesses and respectively conductively connects the bottom ends of the external terminals to the metal layers.

Abstract: A semiconductor device implements upper and lower arms for three phases by a plurality of semiconductor chips, an insulated circuit board, and a printed board, the printed board includes: a plurality of upper relay pattern layers arranged on one main surface of an insulating layer; an upper common pattern layer arranged on the one main surface of the insulating layer; a plurality of lower relay pattern layers arranged to be opposed to the upper relay pattern layers on another main surface opposite to the one main surface of the insulating layer; and a lower common pattern layer arranged to be opposed to the upper common pattern layer on the other main surface of the insulating layer, and control wires electrically connected to the semiconductor chips are partly provided in regions between the upper relay pattern layers and the upper common pattern layer.

Abstract: A semiconductor device includes circuit substrates 3 and 9 including circuit pattern layers 3c/9b, a semiconductor element 5 mounted to the circuit pattern layer 3c, a connecting pin 7 connecting the semiconductor element 5 to the circuit pattern layer 9b, a pin-shaped terminal 17 connected to the circuit pattern layer 9b, a sealing member 2 sealing the circuit substrates 3 and 9, the semiconductor element 5, and the connecting pin 7, and an external terminal 27 including a flat plate portion 27s and an extending portion 27t bent from the flat plate portion 27s and extends away from the circuit substrate 9, in which the flat plate portion 27s is connected to the pin-shaped terminal 17 and arranged in parallel with the circuit pattern layer 9b, and the extending portion 27t is provided in a range of a width in a transverse direction of the sealing member 2.

Abstract: The semiconductor device includes, on the cooling substrate, first main terminal, second main terminal, third main terminal, and fourth main terminal, each having a polygonal-shape. The first external-connection face on upper surface of the first main terminal is connected to positive electrode, and the fourth external-connection face on upper surface of the fourth main terminal is connected to negative electrode. First semiconductor element electrically connected between side surface of the first main terminal and side surface of the second main terminal, and second semiconductor element electrically connected between side surface of the third main terminal and side surface of the fourth main terminal are provided. The second main terminal and the third main terminal are disposed adjacent to each other while being separated, and the first main terminal and the fourth main terminal are disposed adjacent to each other while being separated.

Abstract: A semiconductor device includes: an insulated circuit board including metal layers having recesses, and an insulating board having an upper surface on which the metal layers are arranged; external terminals having bottom ends with a width narrower than the width of openings of the recesses, these bottom ends being inserted into the recesses; a printed circuit board that directly supports the external terminals; and first bonding material that is arranged inside the recesses and respectively conductively connects the bottom ends of the external terminals to the metal layers.

Abstract: A semiconductor device includes a first circuit board on which a first switching element and a first diode connected in inverse parallel are mounted, a second circuit board on which a second switching element and a second diode connected in inverse parallel are mounted, a printed circuit board disposed opposite the first circuit board and the second circuit board, and a plurality of conductive posts which electrically connect the first switching element, the second switching element, the first diode, the second diode, the first circuit board, or the second circuit board and metal layers of the printed circuit board. The first switching element and the second switching element are connected in anti-series to form a bidirectional switch.

Abstract: A semiconductor device includes a first circuit board on which a first switching element and a first diode connected in inverse parallel are mounted, a second circuit board on which a second switching element and a second diode connected in inverse parallel are mounted, a printed circuit board disposed opposite the first circuit board and the second circuit board, and a plurality of conductive posts which electrically connect the first switching element, the second switching element, the first diode, the second diode, the first circuit board, or the second circuit board and metal layers of the printed circuit board. The first switching element and the second switching element are connected in anti-series to form a bidirectional switch.

Abstract: A semiconductor device includes a first circuit board on which a first switching element and a first diode connected in inverse parallel are mounted, a second circuit board on which a second switching element and a second diode connected in inverse parallel are mounted, a printed circuit board disposed opposite the first circuit board and the second circuit board, and a plurality of conductive posts which electrically connect the first switching element, the second switching element, the first diode, the second diode, the first circuit board, or the second circuit board and metal layers of the printed circuit board. The first switching element and the second switching element are connected in anti-series to form a bidirectional switch.

Abstract: A semiconductor device including a semiconductor module 10A, a semiconductor module 10B that has a lower switching voltage threshold than the semiconductor module 10A, and busbars 331 and 32 that connect the semiconductor module 10A and the semiconductor module 10B in parallel to a common terminal. The semiconductor module 10B is connected at a connection point on the busbar 32 at which the inductance relative to the common terminal is higher than that of the semiconductor module 10A. The semiconductor module 10B with the low threshold voltage is turned ON faster than the semiconductor module 10A with the high threshold voltage for input of a common switching voltage, but can restrict the rising of the current due to the high inductance of the busbar 32, thereby enabling restriction of the current imbalance.

Abstract: A semiconductor device includes an insulating substrate having an insulating plate and a circuit plate; a semiconductor chip having a front surface provided with a gate electrode and a source electrode, and a rear surface fixed to the circuit plate; a printed circuit board facing the insulating substrate, and including a first metal layer and a second metal layer; a first conductive post having two ends electrically and mechanically connected to the gate electrode and the first metal layer; a second conductive post having two ends electrically and mechanically connected to the source electrode and the second metal layer; and a circuit impedance reducing element electrically connected between the gate electrode and the source electrode through the first conductive post and the second conductive post.

Abstract: A semiconductor device including: a plurality of semiconductor units each constituting a three-level inverter circuit; and a connection unit electrically connecting the plurality of semiconductor units in parallel, wherein each of the semiconductor units includes: a multi-layer substrate including an insulating plate and circuit plates disposed on a primary surface of the insulating plate; a plurality of semiconductor elements each having a back surface thereof fixed to one of the circuit plates and a front surface thereof having primary electrodes; and wiring members electrically connected to the primary electrodes of the semiconductor elements, and wherein in each of the semiconductor units, the multi-layer substrate, the plurality of semiconductor elements, and the wiring members are configured in such a way as to constitute the three-level inverter circuit.

Abstract: A semiconductor device includes a plurality of semiconductor units each including a laminated substrate formed by laminating an insulating board and a circuit board and a semiconductor element joined to the circuit board using a joining material which irreversibly makes a phase transition into a solid-phase state. In addition, the semiconductor device may include a base plate to which each of the plurality of semiconductor units is joined using solder and a connection unit which electrically connects the plurality of semiconductor units in parallel.

Abstract: A semiconductor device, while being small, makes it possible to achieve low inductance responding to high speed switching. The semiconductor device includes a plurality of conductive pattern members, on each of which is mounted one or a plurality of power semiconductor chips, and a printed circuit board wherein a chip rod-form conductive connection member connected to the power semiconductor chip and a pattern rod-form conductive connection member connected to the conductive pattern member are disposed on the surface opposing the conductive pattern member. The conductive pattern member is formed of a narrow portion and a wide portion, the narrow portion of at least one conductive pattern member and the printed circuit board are connected by the pattern rod-form conductive connection member, and a current path is formed between the conductive pattern member and the power semiconductor chip connected via the chip rod-form conductive connection member to the printed circuit board.

Abstract: A semiconductor module includes sealing resin from which a main terminal protrudes, which seals an insulating substrate. The module includes a semiconductor element and a wiring substrate. The sealing resin has a nut housing portion in which a nut is disposed. The semiconductor module also has a busbar terminal to which a main terminal that protrudes from the sealing resin is electrically connected and which has an insertion hole facing the nut.

Abstract: An organic electro-luminescent (EL) display can have a reduced optical loss and high efficiency, and can be manufactured by an inexpensive method. The organic EL display can be formed by bonding an organic EL element substrate including a substrate, reflective electrode, organic EL layer, separation wall, barrier layer, transparent electrode, and color conversion layer; and a sealing substrate together, wherein: the reflective electrode includes a plurality of partial electrodes; the organic EL layer is formed on the reflective electrode and includes a plurality of parts separated by the separation wall; the transparent electrode is formed on the organic EL layer; the barrier layer covers the separation wall and the transparent electrode, and has a recessed part in a location corresponding to the reflective electrode; and the color conversion layer is formed in the recessed part.