Patents by Inventor Hideyo Okushi

Hideyo Okushi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10066317
    Abstract: A method for manufacturing a single crystal diamond in which vapor phase synthetic single crystal diamond is additionally deposited on a single crystal diamond seed substrate obtained by vapor phase synthesis, includes a step of measuring flatness of the seed substrate, a step of determining whether or not to flatten the seed substrate based on the measurement result of the flatness, and any one of the following two steps of a step of additionally depositing the vapor phase synthetic single crystal diamond after flattening the seed substrate for which the flattening is necessary based on the determination and a step of additionally depositing the vapor phase synthetic single crystal diamond without flattening the seed substrate for which the flattening is not necessary based on the determination.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: September 4, 2018
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Hitoshi Noguchi, Daisuke Takeuchi, Satoshi Yamasaki, Masahiko Ogura, Hiromitsu Kato, Toshiharu Makino, Hideyo Okushi
  • Patent number: 9136400
    Abstract: In this junction element 1, when a forward voltage is applied, a depletion layer is formed in a semiconductor layer 2, prohibiting electrons present in an electrode layer 4 to move into the semiconductor layer 2. For this reason, a majority of holes in a semiconductor layer 3 do not disappear by recombination with conduction electrons in the semiconductor layer 2, but reach the electrode layer 4 while diffusing into the semiconductor layer 2. Accordingly, the junction element 1 can serve as a good conductor for holes, while avoiding the influence of a resistance value, and allows a current to flow therethrough at a level equal to or more than that achieved by a semiconductor element formed of a Si or SiC semiconductor.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: September 15, 2015
    Assignees: NISSAN MOTOR CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Satoshi Tanimoto, Norihiko Kiritani, Toshiharu Makino, Masahiko Ogura, Norio Tokuda, Hiromitsu Kato, Hideyo Okushi, Satoshi Yamasaki
  • Publication number: 20150075420
    Abstract: A method for manufacturing a single crystal diamond in which vapor phase synthetic single crystal diamond is additionally deposited on a single crystal diamond seed substrate obtained by vapor phase synthesis, includes a step of measuring flatness of the seed substrate, a step of determining whether or not to flatten the seed substrate based on the measurement result of the flatness, and any one of the following two steps of a step of additionally depositing the vapor phase synthetic single crystal diamond after flattening the seed substrate for which the flattening is necessary based on the determination and a step of additionally depositing the vapor phase synthetic single crystal diamond without flattening the seed substrate for which the flattening is not necessary based on the determination.
    Type: Application
    Filed: September 17, 2014
    Publication date: March 19, 2015
    Inventors: Hitoshi NOGUCHI, Daisuke TAKEUCHI, Satoshi YAMASAKI, Masahiko OGURA, Hiromitsu KATO, Toshiharu MAKINO, Hideyo OKUSHI
  • Patent number: 8624263
    Abstract: The present invention is contemplated for providing a diamond semiconductor device where an impurity-doped diamond semiconductor is buried in a selected area, and a method of manufacturing the same. That is, a diamond semiconductor device having an impurity-doped diamond area selectively buried in a recessed portion formed in a diamond substrate; and a method of manufacturing a diamond semiconductor device, including the steps of selectively forming an recessed portion on the {100}-facet diamond semiconductor substrate, wherein the bottom face of the recessed portion is surrounded by the {100} facet and the side face of the recessed portion is surrounded by the {110} facet, and forming an impurity-doped diamond area by epitaxially growing diamond in the <111> direction while doping with impurities and burying the recessed portion.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: January 7, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Hiromitsu Kato, Toshiharu Makino, Masahiko Ogura, Hideyo Okushi, Satoshi Yamasaki
  • Publication number: 20110037076
    Abstract: The present invention is contemplated for providing a diamond semiconductor device where an impurity-doped diamond semiconductor is buried in a selected area, and a method of manufacturing the same. That is, a diamond semiconductor device having an impurity-doped diamond area selectively buried in a recessed portion formed in a diamond substrate; and a method of manufacturing a diamond semiconductor device, including the steps of selectively forming an recessed portion on the {100}-facet diamond semiconductor substrate, wherein the bottom face of the recessed portion is surrounded by the {100} facet and the side face of the recessed portion is surrounded by the {110} facet, and forming an impurity-doped diamond area by epitaxially growing diamond in the <111> direction while doping with impurities and burying the recessed portion.
    Type: Application
    Filed: March 6, 2009
    Publication date: February 17, 2011
    Inventors: Hiromitsu Kato, Toshiharu Makino, Masahiko Ogura, Hideyo Okushi, Satoshi Yamasaki
  • Publication number: 20110017991
    Abstract: In this junction element 1, when a forward voltage is applied, a depletion layer is formed in a semiconductor layer 2, prohibiting electrons present in an electrode layer 4 to move into the semiconductor layer 2. For this reason, a majority of holes in a semiconductor layer 3 do not disappear by recombination with conduction electrons in the semiconductor layer 2, but reach the electrode layer 4 while diffusing into the semiconductor layer 2. Accordingly, the junction element 1 can serve as a good conductor for holes, while avoiding the influence of a resistance value, and allows a current to flow therethrough at a level equal to or more than that achieved by a semiconductor element formed of a Si or SiC semiconductor.
    Type: Application
    Filed: February 27, 2009
    Publication date: January 27, 2011
    Inventors: Satoshi Tanimoto, Norihiko Kiritani, Toshiharu Makino, Masahiko Ogura, Norio Tokuda, Hiromitsu Kato, Hideyo Okushi, Satoshi Yamasaki
  • Patent number: 7535025
    Abstract: In silicon carbide semiconductor device and manufacturing method therefor, a metal electrode which is another than a gate electrode and which is contacted with a singlecrystalline silicon carbide substrate is treated with a predetermined heat process at a temperature which is lower than a thermal oxidization temperature by which a gate insulating film is formed and is sufficient to carry out a contact annealing between the singlecrystalline silicon carbide substrate and a metal after a whole surrounding of the gate insulating film is enclosed with the singlecrystalline silicon carbide substrate, a field insulating film, and the gate electrode. The present invention is applicable to a MOS capacitor, an n channel planar power MOSFET, and an n channel planar power IGBT.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: May 19, 2009
    Assignees: Nissan Motor Co., Ltd., National Institute of Advanced Industrial Science and Technology
    Inventors: Satoshi Tanimoto, Hideyo Okushi
  • Publication number: 20050093000
    Abstract: In silicon carbide semiconductor device and manufacturing method therefor, a metal electrode which is another than a gate electrode and which is contacted with a singlecrystalline silicon carbide substrate is treated with a predetermined heat process at a temperature which is lower than a thermal oxidization temperature by which a gate insulating film is formed and is sufficient to carry out a contact annealing between the singlecrystalline silicon carbide substrate and a metal after a whole surrounding of the gate insulating film is enclosed with the singlecrystalline silicon carbide substrate, a field insulating film, and the gate electrode. The present invention is applicable to a MOS capacitor, an n channel planar power MOSFET, and an n channel planar power IGBT.
    Type: Application
    Filed: December 6, 2004
    Publication date: May 5, 2005
    Applicants: NISSAN MOTOR CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Satoshi Tanimoto, Hideyo Okushi
  • Patent number: 6833562
    Abstract: In silicon carbide semiconductor device and manufacturing method therefor, a metal electrode which is another than a gate electrode and which is contacted with a singlecrystalline silicon carbide substrate is treated with a predetermined heat process at a temperature which is lower than a thermal oxidization temperature by which a gate insulating film is formed and is sufficient to carry out a contact annealing between the singlecrystalline silicon carbide substrate and a metal after a whole surrounding of the gate insulating film is enclosed with the singlecrystalline silicon carbide substrate, a field insulating film, and the gate electrode. The present invention is applicable to a MOS capacitor, an n channel planar power MOSFET, and an n channel planar power IGBT.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: December 21, 2004
    Assignees: Nissan Motor Co., Ltd., National Institute of Advanced Industrial Science and Technology
    Inventors: Satoshi Tanimoto, Hideyo Okushi
  • Patent number: 6815721
    Abstract: A diamond semiconductor has an exciton light-emission intensity characteristic that varies nonlinearly.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: November 9, 2004
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Hideyo Okushi, Hideyuki Watanabe, Daisuke Takeuchi, Koji Kajimura
  • Publication number: 20040169178
    Abstract: A diamond semiconductor has an exciton light-emission intensity characteristic that varies nonlinearly.
    Type: Application
    Filed: March 8, 2004
    Publication date: September 2, 2004
    Applicant: Agency of Ind Sci & Tech Min of Int'l Trade & Ind
    Inventors: Hideyo Okushi, Hideyuki Watanabe, Daisuke Takeuchi, Koji Kajimura
  • Patent number: 6756086
    Abstract: A diamond semiconductor includes a high-quality thin diamond film layer with few crystal defects and few impurities, implanted with ions of dopant elements and controllable in conductivity determined by a kind and a concentration of the dopant elements. The diamond semiconductor is fabricated by a method including the step of implanting ions of dopant elements into a high-quality thin diamond film layer with few crystal defects and few impurities under conditions that can attain given distribution of concentrations of the dopant elements and with the high-quality thin diamond film layer kept to a temperature in accordance with the conditions so as not to be graphitized, to thereby enable the diamond semiconductor to have conductivity determined by a kind and a concentration of the dopant elements.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: June 29, 2004
    Assignees: Agency of Industrial Science and Technology, Ministry of International Trade and Industry, Japan Science and Technology Corporation
    Inventors: Masataka Hasegawa, Masahiko Ogura, Daisuke Takeuchi, Hideyo Okushi, Naoto Kobayashi, Sadanori Yamanaka
  • Patent number: 6727171
    Abstract: A diamond pn junction diode includes a p-type diamond thin-film layer formed on a substrate and an n-type diamond thin-film layer formed by forming a high-quality undoped diamond thin-film layer on the p-type diamond thin-film layer and ion-implanting an impurity into the high-quality undoped diamond thin-film layer, or alternatively includes an n-type diamond thin-film layer formed on a substrate and a p-type diamond thin-film layer formed by forming a high-quality undoped diamond thin-film layer on the n-type diamond thin-film layer and ion-implanting an impurity into the high-quality undoped diamond thin-film layer.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: April 27, 2004
    Inventors: Daisuke Takeuchi, Hideyuki Watanabe, Hideyo Okushi, Masataka Hasegawa, Masahiko Ogura, Naoto Kobayashi, Koji Kajimura, Sadanori Yamanaka
  • Publication number: 20030155654
    Abstract: A diamond pn junction diode includes a p-type diamond thin-film layer formed on a substrate and an n-type diamond thin-film layer formed by forming a high-quality undoped diamond thin-film layer on the p-type diamond thin-film layer and ion-implanting an impurity into the high-quality undoped diamond thin-film layer, or alternatively includes an n-type diamond thin-film layer formed on a substrate and a p-type diamond thin-film layer formed by forming a high-quality undoped diamond thin-film layer on the n-type diamond thin-film layer and ion-implanting an impurity into the high-quality undoped diamond thin-film layer.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 21, 2003
    Applicant: Agy Indust'l Sci & Tech, Min Int'l Trade & Indstry
    Inventors: Daisuke Takeuchi, Hideyuki Watanabe, Hideyo Okushi, Masataka Hasegawa, Masahiko Ogura, Naoto Kobayashi, Koji Kajimura, Sadanori Yamanaka
  • Publication number: 20030107041
    Abstract: In silicon carbide semiconductor device and manufacturing method therefor, a metal electrode which is another than a gate electrode and which is contacted with a singlecrystalline silicon carbide substrate is treated with a predetermined heat process at a temperature which is lower than a thermal oxidization temperature by which a gate insulating film is formed and is sufficient to carry out a contact annealing between the singlecrystalline silicon carbide substrate and a metal after a whole surrounding of the gate insulating film is enclosed with the singlecrystalline silicon carbide substrate, a field insulating film, and the gate electrode. The present invention is applicable to a MOS capacitor, an n channel planar power MOSFET, and an n channel planar power IGBT.
    Type: Application
    Filed: December 2, 2002
    Publication date: June 12, 2003
    Applicant: Nissan Motor Co., Ltd.
    Inventors: Satoshi Tanimoto, Hideyo Okushi
  • Publication number: 20020127405
    Abstract: A diamond semiconductor includes a high-quality thin diamond film layer with few crystal defects and few impurities, implanted with ions of dopant elements and controllable in conductivity determined by a kind and a concentration of the dopant elements. The diamond semiconductor is fabricated by a method including the step of implanting ions of dopant elements into a high-quality thin diamond film layer with few crystal defects and few impurities under conditions that can attain given distribution of concentrations of the dopant elements and with the high-quality thin diamond film layer kept to a temperature in accordance with the conditions so as not to be graphitized, to thereby enable the diamond semiconductor to have conductivity determined by a kind and a concentration of the dopant elements.
    Type: Application
    Filed: March 6, 2002
    Publication date: September 12, 2002
    Applicant: Agency of Industrial Science and Technology
    Inventors: Masataka Hasegawa, Masahiko Ogura, Daisuke Takeuchi, Hideyo Okushi, Naoto Kobayashi, Sadanori Yamanaka
  • Publication number: 20010025955
    Abstract: A diamond semiconductor has an exciton light-emission intensity characteristic that varies nonlinearly.
    Type: Application
    Filed: December 8, 2000
    Publication date: October 4, 2001
    Applicant: AGENCY OF INDUSTRIAL SCIENCE & TECHNOLOGY, MINISTRY OF INTERNATIONAL TRADE & INDUSTRY
    Inventors: Hideyo Okushi, Hideyuki Watanabe, Daisuke Takeuchi, Koji Kajimura
  • Patent number: 6132816
    Abstract: A method for producing homoepitaxial diamond thin film is provided which includes a step of effecting plasma assisted CVD with the carbon source concentration of a mixed gas of a carbon source and hydrogen set to a first low level for depositing a high-quality homoepitaxial diamond thin film on a substrate at a low film forming rate and a step of thereafter effecting the plasma assisted CVD with said carbon source concentration set to a second level higher than the first level.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: October 17, 2000
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade and Industry
    Inventors: Daisuke Takeuchi, Hideyo Okushi, Koji Kajimura, Hideyuki Watanabe
  • Patent number: 4532373
    Abstract: An amorphous photovoltaic energy conversion element for use in a solar cell is composed of a first layer formed of a p-type material, a second layer formed of an intrinsic amorphous semiconductor having a potential gradient formed therein and a third layer formed of a metal capable of coming into ohmic contact with the aforementioned intrinsic layer of amorphous semiconductor and exhibiting a lower work function than the work function of the intrinsic layer of amorphous semiconductor.
    Type: Grant
    Filed: March 14, 1984
    Date of Patent: July 30, 1985
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade and Industry
    Inventors: Hideharu Matsuura, Kazunobu Tanaka, Akihisa Matsuda, Hideyo Okushi, Hidetoshi Oheda, Satoshi Yamasaki, Nobuhiro Hata