Patents by Inventor Hideyuki Hamada

Hideyuki Hamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240339690
    Abstract: Disclosed herein is an electrochemical energy storage device including a plurality of electrochemical cells in a containing space in a housing. The electrochemical energy storage device includes a first duct that runs parallel to the top or the bottom of the housing and one or more heat transfer members that are arranged in spaces between the electrochemical cells, where at least one of the heat transfer members protrudes into the first duct.
    Type: Application
    Filed: July 26, 2022
    Publication date: October 10, 2024
    Inventors: Peter HEIDEBRECHT, Philipp SCHAEFER, Wolfgang JABCZYNSKI, Daniel MALKO, Hideyuki HAMADA, Koji HOSHINO
  • Patent number: 12095182
    Abstract: Stub conductors are disposed so as to surround an outer periphery of a patch conductor and be spaced from the patch conductor with a gap positioned between the stub conductors and the patch conductor.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: September 17, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Go Itami, Hiroshi Hamada, Hideyuki Nosaka
  • Patent number: 9887395
    Abstract: This secondary battery includes a tubular battery body and a cover member containing the battery body. The cover member includes a tubular body at least covering a side surface of the battery body and a bottom which at least part of a bottom surface of the battery body contacts. The bottom includes an expansion expanded in a direction away from the bottom surface of the battery body, and an end surface of the expansion contacts the insulating plate. The area of the end surface of the expansion is smaller than the area of the bottom surface of the battery body.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: February 6, 2018
    Assignee: NGK Insulators, Ltd.
    Inventor: Hideyuki Hamada
  • Publication number: 20160172637
    Abstract: This secondary battery includes a tubular battery body and a cover member containing the battery body. The cover member includes a tubular body at least covering a side surface of the battery body and a bottom which at least part of a bottom surface of the battery body contacts. The bottom includes an expansion expanded in a direction away from the bottom surface of the battery body, and an end surface of the expansion contacts the insulating plate. The area of the end surface of the expansion is smaller than the area of the bottom surface of the battery body.
    Type: Application
    Filed: February 25, 2016
    Publication date: June 16, 2016
    Inventor: Hideyuki HAMADA
  • Patent number: 6504186
    Abstract: In a semiconductor device provided with a plurality of standard cells each comprising an input terminal and MOS transistors, a diffused region having a substantially negligibly small resistance is formed in a semiconductor substrate, and the input terminal of the standard cell and gates of the MOS transistors are connected through the diffused region. Also, a diffused region is formed under the input terminal in the substrate, and the input terminal is connected to the diffused region. In a modification, another standard cell is formed by forming a diffused region and a metal layer connected to the diffused region on the substrate, and the another standard cell is connected to the input terminal.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: January 7, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshiki Kanamoto, Yoshihide Ajioka, Yukihiko Shimazu, Hideyuki Hamada
  • Publication number: 20010011734
    Abstract: In a semiconductor device provided with a plurality of standard cells each comprising an input terminal and MOS transistors, a diffused region having a substantially negligibly small resistance is formed in a semiconductor substrate, and the input terminal of the standard cell and gates of the MOS transistors are connected through the diffused region. Also, a diffused region is formed under the input terminal in the substrate, and the input terminal is connected to the diffused region. In a modification, another standard cell is formed by forming a diffused region and a metal layer connected to the diffused region on the substrate, and the another standard cell is connected to the input terminal.
    Type: Application
    Filed: June 4, 1998
    Publication date: August 9, 2001
    Inventors: TOSHIKI KANAMOTO, YOSHIHIDE AJIOKA, YUKIHIKO SHIMAZU, HIDEYUKI HAMADA