Patents by Inventor Hideyuki Hatoh

Hideyuki Hatoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9460895
    Abstract: A gas supply method includes controlling communication between first and second gas pipes and a diffusion chamber using first and second valves; controlling discharge of gas within the first and second gas pipes using third and fourth valves connected upstream from the first and second valves; and controlling communication between an exhaust pipe and the diffusion chamber using a fifth valve. The gas supply method further includes a first pressurization step of closing the first valve and the third valve before starting a first step and pressurizing a first gas within the first gas pipe; a second pressurization step of closing the second valve and the fourth valve before starting a second step and pressurizing a second gas within the second gas pipe; and an exhaust step of opening the fifth valve upon starting the first step and the second step, and discharging gas within the diffusion chamber.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: October 4, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Hideyuki Hatoh, Hiroyuki Ogawa
  • Patent number: 9202706
    Abstract: A method of forming a pattern on a silicon layer of a substrate, to be processed, wherein a semiconductor device is formed at a front surface side of the substrate that is supported by a support substrate at the front surface side, includes an etching step of etching the substrate by plasma via a mask having a predetermined pattern formed at a back surface side of the silicon layer of the substrate; and a cleaning step of cleaning the substrate by plasma using cleaning gas obtained by mixing CF series gas and inert-gas, after the etching step.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: December 1, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takahisa Iwasaki, Hideyuki Hatoh, Yoshisato Oikawa
  • Publication number: 20140361102
    Abstract: A gas supply method includes controlling communication between first and second gas pipes and a diffusion chamber using first and second valves; controlling discharge of gas within the first and second gas pipes using third and fourth valves connected upstream from the first and second valves; and controlling communication between an exhaust pipe and the diffusion chamber using a fifth valve. The gas supply method further includes a first pressurization step of closing the first valve and the third valve before starting a first step and pressurizing a first gas within the first gas pipe; a second pressurization step of closing the second valve and the fourth valve before starting a second step and pressurizing a second gas within the second gas pipe; and an exhaust step of opening the fifth valve upon starting the first step and the second step, and discharging gas within the diffusion chamber.
    Type: Application
    Filed: March 8, 2013
    Publication date: December 11, 2014
    Inventors: Hideyuki Hatoh, Hiroyuki Ogawa
  • Publication number: 20140311676
    Abstract: A substrate mounting table (94) is equipped with a mounting table (2), an electrostatic chuck (6), and a bevel covering (5). The electrostatic chuck (6) has a supporting surface (6e) which is in contact with the whole of the rear surface of a wafer (W). The annular bevel covering (5) has an outer diameter (DA) which is greater than that of the supporting surface (6e), and an inner diameter (DI) which is smaller than that of the wafer (W). The bevel covering (5) is disposed such that, when viewed from the direction orthogonal to the supporting surface (6e), the bevel covering (5) surrounds the periphery of the wafer (W) supported on the supporting surface (6e).
    Type: Application
    Filed: January 15, 2013
    Publication date: October 23, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hideyuki Hatoh, Shigeki Doba, Shinya Yamamoto, Satoshi YAMADA, Hiroto Mori, Kenji Ando
  • Patent number: 8664117
    Abstract: Provided is a semiconductor device manufacturing method enabling miniaturization by forming a hole in a vertical shape, capable of reducing the number of processes as compared to conventional methods, and capable of increasing productivity. The semiconductor device manufacturing method includes: forming a hole in a substrate; forming a polyimide film within the hole; anisotropically etching the substrate without using a mask covering a sidewall portion of the polyimide film within the hole and removing at least a part of a bottom portion of the polyimide film within the hole while the sidewall portion of the polyimide film remains within the hole; and filling the hole with a conductive metal.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: March 4, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Katsuyuki Ono, Yusuke Hirayama, Hideyuki Hatoh
  • Publication number: 20140042583
    Abstract: A method of forming a pattern on a silicon layer of a substrate, to be processed, wherein a semiconductor device is formed at a front surface side of the substrate that is supported by a support substrate at the front surface side, includes an etching step of etching the substrate by plasma via a mask having a predetermined pattern formed at a back surface side of the silicon layer of the substrate; and a cleaning step of cleaning the substrate by plasma using cleaning gas obtained by mixing CF series gas and inert-gas, after the etching step.
    Type: Application
    Filed: August 6, 2013
    Publication date: February 13, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Takahisa IWASAKI, Hideyuki Hatoh, Yoshisato Oikawa
  • Publication number: 20130052821
    Abstract: Provided is a semiconductor device manufacturing method enabling miniaturization by forming a hole in a vertical shape, capable of reducing the number of processes as compared to conventional methods, and capable of increasing productivity. The semiconductor device manufacturing method includes: forming a hole in a substrate; forming a polyimide film within the hole; isotropically etching the substrate without using a mask covering a sidewall portion of the polyimide film within the hole and removing at least a part of a bottom portion of the polyimide film within the hole while the sidewall portion of the polyimide film remains within the hole; and filling the hole with a conductive metal.
    Type: Application
    Filed: March 4, 2011
    Publication date: February 28, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Katsuyuki Ono, Yusuke Hirayama, Hideyuki Hatoh