Patents by Inventor Hideyuki Kashio

Hideyuki Kashio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8631549
    Abstract: A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: January 21, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Kenichi Kawasaki, Makoto Ogawa, Shigeyuki Kuroda, Shunsuke Takeuchi, Hideyuki Kashio
  • Patent number: 8341815
    Abstract: A laminate is prepared in which adjacent internal electrodes are electrically insulated from each other at an end surface at which the internal electrodes are exposed, a space between the adjacent internal electrodes, which is measured in the thickness direction of insulating layers, is about 10 ?m or less when a withdrawn distance of the adjacent internal electrodes from the end surface is about 1 ?m or less, and is about 20 ?m or less when a protruding length of the adjacent internal electrodes from the end surface is at least about 0.1 ?m. In an electroplating step, electroplating deposits deposited on the ends of the adjacent internal electrodes are grown so as to be connected to each other.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: January 1, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tatsuo Kunishi, Yoshihiko Takano, Shigeyuki Kuroda, Akihiro Motoki, Hideyuki Kashio, Takashi Noji
  • Patent number: 8154849
    Abstract: A laminate is prepared in which adjacent internal electrodes are electrically insulated from each other at an end surface at which the internal electrodes are exposed, a space between the adjacent internal electrodes, which is measured in the thickness direction of insulating layers, is about 10 ?m or less, and a withdrawn distance of the adjacent internal electrodes from the end surface is about 1 ?m or less. In an electroplating step, electroplating deposits deposited on the ends of the adjacent internal electrodes are grown so as to be connected to each other.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: April 10, 2012
    Assignee: Murata Manufacturing Co. Ltd.
    Inventors: Tatsuo Kunishi, Yoshihiko Takano, Shigeyuki Kuroda, Akihiro Motoki, Hideyuki Kashio, Takashi Noji
  • Publication number: 20110162180
    Abstract: A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.
    Type: Application
    Filed: March 18, 2011
    Publication date: July 7, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro MOTOKI, Kenichi KAWASAKI, Makoto OGAWA, Shigeyuki KURODA, Shunsuke TAKEUCHI, Hideyuki KASHIO
  • Patent number: 7933113
    Abstract: A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: April 26, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Kenichi Kawasaki, Makoto Ogawa, Shigeyuki Kuroda, Shunsuke Takeuchi, Hideyuki Kashio
  • Publication number: 20100243133
    Abstract: A laminate is prepared in which adjacent internal electrodes are electrically insulated from each other at an end surface at which the internal electrodes are exposed, a space between the adjacent internal electrodes, which is measured in the thickness direction of insulating layers, is about 10 ?m or less, and a withdrawn distance of the adjacent internal electrodes from the end surface is about 1 ?m or less. In an electroplating step, electroplating deposits deposited on the ends of the adjacent internal electrodes are grown so as to be connected to each other.
    Type: Application
    Filed: June 9, 2010
    Publication date: September 30, 2010
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Tatsuo KUNISHI, Yoshihiko TAKANO, Shigeyuki KURODA, Akihiro MOTOKI, Hideyuki KASHIO, Takashi NOJI
  • Publication number: 20080239617
    Abstract: A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.
    Type: Application
    Filed: March 26, 2008
    Publication date: October 2, 2008
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro MOTOKI, Kenichi KAWASAKI, Makoto OGAWA, Shigeyuki KURODA, Shunsuke TAKEUCHI, Hideyuki KASHIO
  • Publication number: 20080123248
    Abstract: A laminate is prepared in which adjacent internal electrodes are electrically insulated from each other at an end surface at which the internal electrodes are exposed, a space between the adjacent internal electrodes, which is measured in the thickness direction of insulating layers, is about 10 ?m or less, and a withdrawn distance of the adjacent internal electrodes from the end surface is about 1 ?m or less. In an electroplating step, electroplating deposits deposited on the ends of the adjacent internal electrodes are grown so as to be connected to each other.
    Type: Application
    Filed: February 13, 2008
    Publication date: May 29, 2008
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Tatsuo Kunishi, Yoshihiko Takano, Shigeyuki Kuroda, Akihiro Motoki, Hideyuki Kashio, Takashi Noji
  • Patent number: 4797648
    Abstract: A chip inductor having a pair of terminal electrodes formed on the surface of a magnetic core which holds a winding therearound. The terminal electrodes have films which are made from a nickel alloy having a relatively high resistivity and a relatively low magnetic permeability. Such nickel alloys includes, for example, nickel-chromium alloy, nickel-phosphorus alloy and nickel-copper alloy.
    Type: Grant
    Filed: March 9, 1988
    Date of Patent: January 10, 1989
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Toshimi Kaneko, Ryuichi Fujinaga, Tetsuya Morinaga, Atsuo Senda, Toshi Numata, Hideyuki Kashio