Patents by Inventor Hideyuki Kawakita

Hideyuki Kawakita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12213279
    Abstract: An electronic control device includes a base, a first fan and a second fan provided on one surface, a plurality of first heat-dissipating fins provided on the one surface in a first region including a region between first and second fans such that the plurality of first heat-dissipating fins are provided in the region between the first second fans, and a plurality of second heat-dissipating fins provided on the one surface and in a second region. The plurality of first heat-dissipating fins guide a refrigerant sent by one of the first and second fans toward a remaining one of the first and second fans in the first region, and the plurality of second heat-dissipating fins provided in the second region have a structure for guiding a refrigerant flowing in from the first fan or the second fan away from the first fan and the second fan.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: January 28, 2025
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Shinya Kawakita, Hideyuki Sakamoto, Minami Teranishi, Miki Hiraoka
  • Publication number: 20100324877
    Abstract: A device property output apparatus includes an input unit configured to accept measured data of a device property, target data of the device property, and first simulation data indicating a simulation result of the device property, a reference data generator configured to generate reference data indicating a relationship between the measured data and the target data, a converter configured to conduct scale conversion of the first simulation data to generate second simulation data based on the reference data, and an output unit configured to output the second simulation data or auxiliary information indicating a difference between the target data and the second simulation data.
    Type: Application
    Filed: March 19, 2010
    Publication date: December 23, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hideyuki Kawakita
  • Patent number: 5930470
    Abstract: A target CPU executes a user program in synchronism with an asynchronous operation clock signal at higher speed than an operation clock signal of a debugging object system. A control unit portion outputs address bus information, data bus information, and machine cycle information in operation. A POD portion generates various control signals of the debugging object system based on the machine cycle information and then the address bus information, the data bus information, and the machine cycle information to the debugging object system in synchronism with an operation clock signal of the debugging object system. Collection, output, or process of debugging information can thus be executed by use of difference in execution times of the user program between the debugging object system and the target CPU, without halting the debugging object system.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoaki Noguchi, Hideyuki Kawakita