Abstract: According to one embodiment, a semiconductor device includes a board, a controller chip, a semiconductor chip, a sealing portion, and a component. The board includes a first surface and a second surface opposite to the first surface, the first surface comprising a terminal. The controller chip is on the second surface of the board. The semiconductor chip is on the second surface of the board. The sealing portion integrally covers the controller chip and the semiconductor chip and does not cover a region of the second surface of the board. The component is on the region of the second surface of the board to perform an operation with respect to the outside of the semiconductor device.

Abstract: The scanning lines driver circuit according to this invention comprises a timing circuit unit to which voltage is supplied from a power source, a level shifter circuit unit that generates voltage for driving pixel switching devices, a plurality of gate voltage sources that connect power sources to the level shifter circuit unit and a gate buffer unit that supplies the output from the level shifter circuit unit to scanning lines. The level shifter circuit unit is a series of flip-flop type level shifter circuits that conduct level shifting for each gate voltage source and transistors controlled by a power source detection circuit are inserted in parallel in the outputs from those level shifter circuits.

Abstract: The scanning lines driver circuit according to this invention comprises a timing circuit unit to which voltage is supplied from a power source, a level shifter circuit unit that generates voltage for driving pixel switching devices, a plurality of gate voltage sources that connect power sources to the level shifter circuit unit and a gate buffer unit that supplies the output from the level shifter circuit unit to scanning lines. The level shifter circuit unit is a series of flip-flop type level shifter circuits that conduct level shifting for each gate voltage source and transistors controlled by a power source detection circuit are inserted in parallel in the outputs from those level shifter circuits.