Patents by Inventor Hideyuki Kokatsu
Hideyuki Kokatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11508686Abstract: A semiconductor device includes a semiconductor chip and a package. The semiconductor chip includes a signal processing circuit, a plurality of pads, and a first resistor which arc formed on a semiconductor substrate. On the semiconductor chip, there is no shot-circuiting between a first pad and a second pad of the plurality of pads. A signal input terminal of the signal processing circuit is connected to the second pad. The first resistor is provided between a reference potential supply terminal for supplying a power supply potential and the first pad. A specific terminal of the plurality of terminals of the package is connected to the first pad by a first bonding wire, and is connected to the second pad by a second bonding wire.Type: GrantFiled: February 9, 2021Date of Patent: November 22, 2022Assignee: THINE ELECTRONICS, INC.Inventor: Hideyuki Kokatsu
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Patent number: 11228286Abstract: A linear amplifier outputs differential signals corresponding to differential signals input to a first signal input terminal and a second signal input terminal, and includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third transistor, a fourth transistor, a differential amplifier, and a signal processing circuit. The signal processing circuit includes a first transistor and a second transistor, and includes a resistor as a common voltage output part that outputs a common voltage. The differential amplifier receives the common voltage and a reference voltage, and applies a voltage corresponding to the voltage difference between the common voltage and the reference voltage to the control terminals of the transistors.Type: GrantFiled: October 1, 2020Date of Patent: January 18, 2022Assignee: THINE ELECTRONICS, INC.Inventor: Hideyuki Kokatsu
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Publication number: 20210257328Abstract: A semiconductor device includes a semiconductor chip and a package. The semiconductor chip includes a signal processing circuit, a plurality of pads, and a first resistor which arc formed on a semiconductor substrate. On the semiconductor chip, there is no shot-circuiting between a first pad and a second pad of the plurality of pads. A signal input terminal of the signal processing circuit is connected to the second pad. The first resistor is provided between a reference potential supply terminal for supplying a power supply potential and the first pad. A specific terminal of the plurality of terminals of the package is connected to the first pad by a first bonding wire, and is connected to the second pad by a second bonding wire.Type: ApplicationFiled: February 9, 2021Publication date: August 19, 2021Applicant: THINE ELECTRONICS, INC.Inventor: Hideyuki KOKATSU
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Publication number: 20210104980Abstract: A linear amplifier outputs differential signals corresponding to differential signals input to a first signal input terminal and a second signal input terminal, and includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third transistor, a fourth transistor, a differential amplifier, and a signal processing circuit. The signal processing circuit includes a first transistor and a second transistor, and includes a resistor as a common voltage output part that outputs a common voltage. The differential amplifier receives the common voltage and a reference voltage, and applies a voltage corresponding to the voltage difference between the common voltage and the reference voltage to the control terminals of the transistors.Type: ApplicationFiled: October 1, 2020Publication date: April 8, 2021Applicant: THINE ELECTRONICS, INC.Inventor: Hideyuki KOKATSU
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Patent number: 9337729Abstract: The DC-DC converter includes a reference voltage generating circuit that generates a reference voltage. The DC-DC converter includes a modulation clock signal generating circuit that generates a modulation clock signal. The DC-DC converter includes a modulator that performs modulation of the reference voltage in synchronization with the modulation clock signal and outputs a resulting reference signal. The DC-DC converter includes a first comparator that compares the reference signal and a first feedback signal, which is based on the output voltage, and outputs a signal based on a result of the comparison. The DC-DC converter includes a driver that shapes a waveform of a PWM signal, which is based on the signal output from the first comparator, and outputs the PWM signal with the shaped waveform to the control node.Type: GrantFiled: September 18, 2014Date of Patent: May 10, 2016Assignee: Kabushiki Kaisha ToshibaInventor: Hideyuki Kokatsu
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Publication number: 20150188422Abstract: The DC-DC converter includes a reference voltage generating circuit that generates a reference voltage. The DC-DC converter includes a modulation clock signal generating circuit that generates a modulation clock signal. The DC-DC converter includes a modulator that performs modulation of the reference voltage in synchronization with the modulation clock signal and outputs a resulting reference signal. The DC-DC converter includes a first comparator that compares the reference signal and a first feedback signal, which is based on the output voltage, and outputs a signal based on a result of the comparison. The DC-DC converter includes a driver that shapes a waveform of a PWM signal, which is based on the signal output from the first comparator, and outputs the PWM signal with the shaped waveform to the control node.Type: ApplicationFiled: September 18, 2014Publication date: July 2, 2015Inventor: Hideyuki Kokatsu
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Patent number: 8467762Abstract: According to an embodiment, a frequency converting device is provided with a duty adjusting unit that generates a 1/N local signal, which is a local signal with a duty ratio of 1/N, when N is an integral number not smaller than 3 and an N-th high-frequency component included in the local signal is a target of inhibition. Further, this is provided with a mixer that outputs difference or sum between/of the 1/N local signal and an input signal.Type: GrantFiled: March 18, 2011Date of Patent: June 18, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Hideyuki Kokatsu
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Publication number: 20120052831Abstract: According to an embodiment, a frequency converting device is provided with a duty adjusting unit that generates a 1/N local signal, which is a local signal with a duty ratio of 1/N, when N is an integral number not smaller than 3 and an N-th high-frequency component included in the local signal is a target of inhibition. Further, this is provided with a mixer that outputs difference or sum between/of the 1/N local signal and an input signal.Type: ApplicationFiled: March 18, 2011Publication date: March 1, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hideyuki Kokatsu
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Patent number: 8073408Abstract: A semiconductor integrated circuit includes a first input terminal configured to input a baseband signal, a second input terminal configured to input a local oscillation signal, an output terminal configured to output a modulating signal, a first amplifier circuit configured to receive the baseband signal through the first input terminal and to output a first amplified signal of the baseband signal, a 2-multiplying circuit configured to receive the local oscillation signal through the second input terminal and to output a 2-multiplied signal of the local oscillation signal, an adder configured to add the 2-multiplied signal and the first amplified signal and to output an addition signal, a second amplifier circuit configured to receive the addition signal and to output a second amplified signal of the addition signal, and a mixer configured to multiply the second amplified signal and the local oscillation signal and to output the modulating signal to the output terminal.Type: GrantFiled: June 23, 2009Date of Patent: December 6, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Jun Deguchi, Daisuke Miyashita, Hideyuki Kokatsu
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Publication number: 20090318096Abstract: A semiconductor integrated circuit includes a first input terminal configured to input a baseband signal, a second input terminal configured to input a local oscillation signal, an output terminal configured to output a modulating signal, a first amplifier circuit configured to receive the baseband signal through the first input terminal and to output a first amplified signal of the baseband signal, a 2-multiplying circuit configured to receive the local oscillation signal through the second input terminal and to output a 2-multiplied signal of the local oscillation signal, an adder configured to add the 2-multiplied signal and the first amplified signal and to output an addition signal, a second amplifier circuit configured to receive the addition signal and to output a second amplified signal of the addition signal, and a mixer configured to multiply the second amplified signal and the local oscillation signal and to output the modulating signal to the output terminal.Type: ApplicationFiled: June 23, 2009Publication date: December 24, 2009Applicant: Kabushiki Kaisha ToshibaInventors: Jun Deguchi, Daisuke Miyashita, Hideyuki Kokatsu