Abstract: In a wireless power transmitting device, a control circuit outputs a control signal for setting a frequency and a phase of an F-PLL signal generated by an F-PLL, the F-PLL generates the F-PLL signal having the frequency and the phase set by the control signal output from the control circuit, and a frequency conversion circuit generates a transmission signal by converting a frequency of the F-PLL signal generated by the F-PLL.

Abstract: An amplitude and phase control device includes a signal dividing unit to divide a transmission signal into first and second signals and output the first and second signals to a Doherty amplifier, an error calculating unit to acquire, from the Doherty amplifier, a synthesized signal of first and second signals amplified by the Doherty amplifier, multiply the synthesized signal by a reciprocal of a gain of the Doherty amplifier, and calculate an error between a synthesized signal after being multiplied by the reciprocal and the transmission signal, and a controlling unit to control an amplitude of each of the first signal and the second signal output from the signal dividing unit depending on the error calculated by the error calculating unit, and control a phase difference between the first signal output from the signal dividing unit and the second signal output from the signal dividing unit depending on the error.

Abstract: In a wireless power transmitting device, a control circuit outputs a control signal for setting a frequency and a phase of an F-PLL signal generated by an F-PLL, the F-PLL generates the F-PLL signal having the frequency and the phase set by the control signal output from the control circuit, and a frequency conversion circuit generates a transmission signal by converting a frequency of the F-PLL signal generated by the F-PLL.

Abstract: A frequency detection circuit includes a signal source that outputs a first clock signal and a second clock signal that has the same frequency as the first clock signal and a different phase from the first clock signal, a S/H circuit that undersamples a frequency-detection target signal using the first clock signal output from the signal source and outputs a first sampling signal indicating a result of undersampling, and undersamples the frequency-detection target signal using the second clock signal output from the signal source and outputs a second sampling signal indicating a result of undersampling, and a frequency calculation circuit that calculates a phase difference between the first sampling signal output from the S/H circuit and the second sampling signal output from the S/H circuit and calculates the frequency of the frequency-detection target signal on the basis of the phase difference.

Abstract: A signal processing device includes: an amplitude reducing unit to reduce, when a phase shift control signal indicating a phase shift of a transmission wave whose frequency is modulated is output, among amplitudes of a beat signal having a difference frequency between the transmission wave and a reception wave, an amplitude of the beat signal at a timing at which a phase of the transmission wave is shifted in accordance with the phase shift control signal; and a signal converting unit to convert the beat signal whose amplitude at the timing at which the phase of the transmission wave is shifted is reduced by the amplitude reducing unit into a signal in a frequency domain.

Abstract: The phase-synchronizing circuit according to the present disclosure includes: a signal source to output a signal; a signal separator to output part of the signal from the signal source as a transmission signal and receive a reflected signal of the transmission signal; a first phase controller to change a phase of the transmission signal from the signal separator according to a control signal; a signal reflector to pass the transmission signal from the first phase controller as an output signal and output part of the output signal as the reflected signal; and a phase comparator to receive part of the signal from the signal source as a reference signal, compare a phase of the reference signal with a phase of the reflected signal from the signal reflector, and output the control signal corresponding to a phase difference between the reference signal and the reflected signal to the first phase controller.

Abstract: A base station device that forms a plurality of beams TB necessary for covering the entire service area and transmits a communication signal in a time-division manner with each of the plurality of beams TB, and a terminal device that receives the beams TB emitted from the base station device are included. Communication from the base station device to the terminal device is performed with a beam-forming technique. The terminal device compares the received power value of the communication signal in each of the plurality of beams TB received from the base station device with the terminal allowable power value of the terminal device, and, on the basis of the comparison result, transmits a specific signal for selecting a beam TB from the plurality of beams TB to the base station device.

Abstract: A local oscillation device according to the present invention includes: a first local oscillator to output a first local oscillation wave synchronized with a reference signal, the first local oscillator being turned on/off on the basis of a control signal; a second local oscillator to output a second local oscillation wave synchronized with the reference signal and the same in frequency and phase as the first local oscillation wave, the second local oscillator being turned on/off on the basis of the control signal; and a path switching circuit coupled to the first local oscillator and the second local oscillator, the path switching circuit switching paths of the first local oscillation wave and the second local oscillation wave on the basis of the control signal or a signal synchronized with the control signal.

Abstract: Included are a first signal exchanger for exchanging a TXI signal and a TXQ signal output from a transmission baseband unit to signal paths and a TX control unit for controlling generation of the TXI signal and the TXQ signal in the transmission baseband unit on the basis of a measurement result of a reception baseband unit before and after exchange of the signals by the first signal exchanger. As a result, a transceiver only needs to have a single local signal generating unit mounted thereon as a local signal generating unit that is an analog circuit.

Abstract: Included are a first signal exchanger (13) for exchanging a TXI signal and a TXQ signal output from a transmission baseband unit (2) to signal paths (21) and (22), and a TX control unit (50) for controlling generation of the TXI signal and the TXQ signal in the transmission baseband unit (2) on the basis of a measurement result of a reception baseband unit (5) before and after exchange of the signals by the first signal exchanger (13). As a result, a transceiver only needs to have a single local signal generating unit (1) mounted thereon as a local signal generating unit that is an analog circuit.

Abstract: A local oscillation device according to the present invention includes: a first local oscillator to output a first local oscillation wave synchronized with a reference signal, the first local oscillator being turned on/off on the basis of a control signal; a second local oscillator to output a second local oscillation wave synchronized with the reference signal and the same in frequency and phase as the first local oscillation wave, the second local oscillator being turned on/off on the basis of the control signal; and a path switching circuit coupled to the first local oscillator and the second local oscillator, the path switching circuit switching paths of the first local oscillation wave and the second local oscillation wave on the basis of the control signal or a signal synchronized with the control signal.

Abstract: Synthesizers (32, 24) for synthesizing feedback signals output from a plurality of antenna modules (4) are provided. A distortion compensation signal output unit (15) derives, from a difference between a feedback signal synthesized by the synthesizers (32, 24) and a base band signal output from a modulation unit (12), a distortion compensation coefficient that provides, to the base band signal, distortion characteristics opposite to distortion characteristics of a signal radiated from the phased array antenna and outputs a predistortion signal representing the distortion compensation coefficient to a PD unit (13).

Abstract: A problem with conventional distortion pulse shift circuits is that the output timing of a pulse signal cannot be controlled unless a reset signal is used.

Abstract: A problem with conventional distortion pulse shift circuits is that the output timing of a pulse signal cannot be controlled unless a reset signal is used.

Abstract: Synthesizers (32, 24) for synthesizing feedback signals output from a plurality of antenna modules (4) are provided. A distortion compensation signal output unit (15) derives, from a difference between a feedback signal synthesized by the synthesizers (32, 24) and a base band signal output from a modulation unit (12), a distortion compensation coefficient that provides, to the base band signal, distortion characteristics opposite to distortion characteristics of a signal radiated from the phased array antenna and outputs a predistortion signal representing the distortion compensation coefficient to a PD unit (13).

Abstract: A mobile communications system including a mobile terminal 1 and a base station 2 which relays communications between a network and the mobile terminal 1, in which the base station 2 can deliver information to the mobile terminal 1 by using an MBMS, in which the base station 2 sets a flag indicating presence or absence of emergency information to a control channel used for the MBMS, and notifies the presence or absence of the emergency information to the mobile terminal 1 by using the description of the flag set to the control channel for the MBMS.

Abstract: A first clock generation circuit 21 generates a first clock rising at the time which is delayed by ?T (0.5<?<1.0) from the transition point of each data of a received signal having a time period of T which is Manchester-encoded. A second clock generation circuit 22 generates a second clock rising at the time which is delayed by ?T (0.5<?<1.0) from the transition point, ?T being different from ?T. A data detection circuit 31 outputs first and second detection results of the received signal on the basis of the first and second clocks, and a determination circuit 41 performs determination on the received signal on the basis of the first and second detection results.

Abstract: Disclosed is a frequency synthesizer including first and second shift register circuits 3a and 3b each for outputting PLL setting data on a rising edge of a load enable signal, first and second fractional modulators 4a and 4b each for generating dividing number control data on the basis of the PLL setting data in synchronization with a reference signal, and first and second fractional PLL synthesizers 5a and 5b each for generating a high frequency signal according to the PLL setting data, the reference signal, and the dividing number control data. By controlling the timing of the load enable signal, the frequency synthesizer carries out phase control between the high frequency signals generated by the first and second fractional PLL synthesizers 5a and 5b.

Abstract: A signal source synchronization circuit includes: a first TDC circuit that measures a first path delay time which is a time difference between an input time of a trigger signal to a first input terminal and an input time of the trigger signal to a second input terminal; and a second TDC circuit that measures a second path delay time which is a time difference between an input time of the trigger signal to a first input terminal and an input time of the trigger signal to a second input terminal, wherein a first phase shifter adjustment circuit sets a phase adjustment amount corresponding to the first path delay time in a first phase shifter, and a second phase shifter adjustment circuit sets a phase adjustment amount corresponding to the second path delay time in a second phase shifter.

Abstract: Disclosed is a frequency synthesizer including first and second shift register circuits 3a and 3b each for outputting PLL setting data on a rising edge of a load enable signal, first and second fractional modulators 4a and 4b each for generating dividing number control data on the basis of the PLL setting data in synchronization with a reference signal, and first and second fractional PLL synthesizers 5a and 5b each for generating a high frequency signal according to the PLL setting data, the reference signal, and the dividing number control data. By controlling the timing of the load enable signal, the frequency synthesizer carries out phase control between the high frequency signals generated by the first and second fractional PLL synthesizers 5a and 5b.