Abstract: A switching signal generator for a switching power supply employing a DC-DC modulator has an adder, an integrator and a quantizer. A gate driver circuit is provided upstream of a power switch element and receives a quantizer output. By feeding back a gate driver circuit output to the adder of the &Dgr;&Sgr;-modulator, a large phase margin is obtained at a high-frequency switching. The switching signal generator for the &Dgr;&Sgr;-modulation type switching power supply has an improved direct-current transmission linearity characteristic relative to direct-current input, and that is stably controllable and of high efficiency. Furthermore, a DC-DC converter has an adder, an integrator and a quantizer, the integrator having a mechanism for adjusting its gain.

Abstract: The present invention provides a switching power supply capable of limiting power supply output power with a method compatible with reduced size regardless of the modulation system. The present invention is able to provide a compact switching power supply that enables the amount of limitation of power supply output power to be regulated as desired with little inrush current and overshoot particularly in the case of adapting to power supply soft starting by providing a reset device between a switching signal generation device and switching element, applying a reset pulse signal to reset device, and changing the duty of the above reset pulse signal between 0% and 100%.

Abstract: In a high frequency power amplifier module of a multi-stage structure in which a plurality of heterojunction bipolar transistors (npn-type HBTs) are cascade-connected, a protection circuit in which a plurality of pn junction diodes are connected in series is connected between the collector and emitter of each HBT. The p-side is connected to the collector side, and the n-side is connected to the emitter side. A protection circuit in which pn junction diodes of the number equal to or smaller than that of the pn junction diodes are connected in series is connected between the base and the emitter. The p-side is connected to the base side, and the n-side is connected to the emitter side. With the configuration, in the case where an overvoltage is applied across the collector and emitter due to a fluctuation in load on the antenna side, the collector terminal is clamped by an ON-state voltage of the protection circuits, so that the HBT can be prevented from being destroyed.

Abstract: The present invention provides a stable, highly efficient DC-DC converter that uses &Dgr;&Sgr; modulation capable of limiting excessive peak current flowing inside the converter by monitoring the current flowing inside the converter with an integrator located inside the &Dgr;&Sgr; modulator. A highly efficient &Dgr;&Sgr; modulation type of DC-DC converter can be provided capable of stable control without requiring a detection resistor by composing the &Dgr;&Sgr; modulator with an adder, integrator, quantizer and attenuator, providing an AND circuit that limits the on period of the output signal of a power switching element, and limiting the excessive peak current flowing within the converter.

Abstract: A nonlinear editing method for performing editing by displaying an editing window having a area for displaying a track on a display device and disposing a clip representing a selected material on the track, the nonlinear editing method including: having a first object for representing an editing parameter specific to the clip and a second object for representing an editing parameter specific to the track on which the clip is disposed; and performing editing while selectively operating the first object and the second object.

Abstract: The present invention provides a stable, highly efficient DC-DC converter that uses &Dgr;&Sgr; modulation capable of limiting excessive peak current flowing inside the converter by monitoring the current flowing inside the converter with an integrator located inside the &Dgr;&Sgr; modulator.

Abstract: The present invention provides a switching power supply capable of limiting power supply output power with a method compatible with reduced size regardless of the modulation system. The present invention is able to provide a compact switching power supply that enables the amount of limitation of power supply output power to be regulated as desired with little inrush current and overshoot particularly in the case of adapting to power supply soft starting by providing a reset device between a switching signal generation device and switching element, applying a reset pulse signal to reset device, and changing the duty of the above reset pulse signal between 0% and 100%.

Abstract: A switching signal generator for a switching power supply employing a DC-DC modulator has an adder, an integrator and a quantizer. A gate driver circuit is provided upstream of a power switch element and receives a quantizer output. By feeding back a gate driver circuit output to the adder of the &Dgr;&Sgr;-modulator, a large phase margin is obtained at a high-frequency switching. The switching signal generator for the &Dgr;&Sgr;-modulation type switching power supply has an improved direct-current transmission linearity characteristic relative to direct-current input, and that is stably controllable and of high efficiency. Furthermore, a DC-DC converter has an adder, an integrator and a quantizer, the integrator having a mechanism for adjusting its gain.

Abstract: An apparatus for processing data signals such as audio signals of plural channels individually. The apparatus comprises a first number of setting means to set parameters for processing the data signal of at least one channel; a second number of signal processing means to process the data signal of at least one channel on the basis of the parameters set by the setting means; a selection means to select, from the first number of channels, a smaller number of the channels than the second number; and an allocation means for allocating the selected channels correspondingly to any of the second number of the signal processing means. The state (on or off) of a real time button of each track module corresponding to the relevant virtual track is confirmed, then any virtual track corresponding to the on-state track module is allocated to a vacant real channel, and the mutual correspondence between the virtual tracks and the real channels is stored.

Abstract: A surface polishing apparatus includes a disk-like polishing tool, a polishing solution spray mechanism, and a polishing solution suction mechanism. The polishing tool has a work surface to which a polishing solution is supplied and against which a workpiece is pressed. The polishing tool is driven/rotated to surface-polish the workpiece. The polishing solution supply mechanism is disposed on the upstream side of the workpiece in the rotational direction of the polishing tool to supply a polishing solution to the work surface of the polishing tool. The polishing solution suction mechanism is disposed on the downstream side of the workpiece in the rotational direction of the polishing tool to draw and recover the polishing solution on the work surface of the polishing tool.

Abstract: The semiconductor device having both vertically arranged CCDs and a horizontal CCD, such as, in connection with a solid state image pickup device, is provided with a horizontal CCD in which the transfer speed and the transfer efficiency of a horizontal CCD thereof is improved substantially. In such a device, a plurality of photodiodes are provided on a semiconductor substrate, vertical CCDs are provided on the semiconductor substrate for transferring signal charges of the photodiodes and a horizontal CCD is provided on the semiconductor substrate for transferring signal charges received from the vertical CCDs. The vertical and horizontal CCDs of such a semiconductor device are formed in a well structure provided on the substrate such that the depletion region extending from the channel of the horizontal CCD and a depletion region produced between the underlying substrate and the well are configured to meet each other under each of the transfer electrodes of the horizontal CCD.

Abstract: A solid-state imaging device includes a vertical CCD shift register for transferring electric charge. The electrode of the vertical CCD located nearest to the substrate is extended outside of the region of the vertical CCD to a region of a layer where isolation is required. The layer is thus imparted with two functions, that is, the function of the CCD electrode and that of the iolation electrode. An overflow transistor is also provided to discharge excess charge produced by high intensity light.

Abstract: Vertical CCD registers constituting parts of an interline type CCD imaging device hold independently the signal charges transferred from photoelectric conversion elements and having different storage durations. Transfer of charge to the vertical CCD registers from the photoelectric conversion element is performed at least twice during one field period. The vertical CCD registers transfer the signal charges of different storage durations independent of one another.

Abstract: A solid-state imaging device having a plurality of semiconductor layers of a first conductivity type for photo-electric conversion provided on the surface of a first semiconductor layer of a second conductivity type which is formed on a part of one surface of a semiconductor substrate of the first conductivity type, a semiconductor layer of the first conductivity type for charge transfer provided on the surface of a second semiconductor layer of the second conductivity type which is formed on a part of the surface of the substrate, and a signal output means. The first semiconductor layer of the second conductivity type and the second semiconductor layer of the second conductivity type are formed in different steps so that the first semiconductor layer is disposed deeper than the second semiconductor layer.

Abstract: A charge transfer type solid-state device incorporating a charge coupled device (CCD). In order to eliminate field after image and smear, at least two electrode pairs are provided in a vertical CCD shift register for transferring the signal charges stored in photoelectric conversion elements, the electrode pairs being disposed within the vertical pitch of the photoelectric conversion elements.