Patents by Inventor Hideyuki Saito
Hideyuki Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150191615Abstract: An ink jet ink including water, a pigment and a polymer. The pigment has a secondary amino group. The polymer contains a unit derived from a monomer having a ring structure containing a tertiary amino group.Type: ApplicationFiled: December 15, 2014Publication date: July 9, 2015Inventors: Katsuhiro Hayashi, Ikuo Nakazawa, Ryota Takeuchi, Hideyuki Saito, Shigemoto Abe, Taro Endo, Ai Sakuma, Naofumi Shimomura
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Publication number: 20140320689Abstract: An image pickup apparatus includes: an image data production unit configured to produce data of a plurality of kinds of images from a picked up image and successively output the data; an image synthesis unit configured to cyclically connect the data of the plurality of kinds of images for each pixel string within a range set in advance for each of the kinds of the images and output the connected data as a stream to produce a virtual synthetic image; and an image sending unit configured to accept, from a host terminal, a data transmission request that designates a rectangular region in the virtual synthetic image, extract and connect data from the stream and transmit the connected data as a new stream to the host terminalType: ApplicationFiled: April 11, 2014Publication date: October 30, 2014Applicant: Sony Computer Entertainment Inc.Inventors: Akio Ohba, Hiroyuki Segawa, Hideyuki Saito, Hidehiko Ogasawara, Tetsugo lnada
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Publication number: 20140152773Abstract: A capture device is equipped with a stereo camera, and generates a plurality of demosaiced images of different sizes in which the left and right frame images have been reduced in stepwise fashion. Further, by cycling through the pixel rows of the rows of the images according to a predetermined rule to produce a connected stream, there is generated a virtual composite image that includes the plurality of demosaiced images, in which the pixel rows of the rows are pixel rows having undergone one round of connection. A host terminal sends to the capture device a data request signal designating a plurality of areas within the composite image, having a shared range in the longitudinal direction. The capture device clips out the designated areas, and sends to the host terminal a stream of a new composite image comprising only the clipped out areas. The host terminal cuts this into separate images, which are expanded into consecutive addresses in a main memory.Type: ApplicationFiled: May 31, 2012Publication date: June 5, 2014Inventors: Akio Ohba, Hiroyuki Segawa, Hideyuki Saito
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Publication number: 20140139740Abstract: A shift time monitoring section of a host terminal monitors a shift between the input timing of frame data from an imaging device and the ideal input timing for the frame data, the ideal input timing being obtained from the output frequency of a display. An operation cycle adjusting section transmits a request signal for adjusting the operation cycle per frame in the imaging device according to the magnitude of the shift in the input timing. An H-counter section of the imaging device counts the outputting of the horizontal synchronizing signal with a vertical synchronizing signal in the imaging device as a starting point, and generates a signal at a predetermined scanning line. A VSync adjusting counter section counts a pixel clock with the signal from the H-counter section as a starting point, and generates a vertical synchronization signal at a value set to the pixel clock.Type: ApplicationFiled: May 31, 2012Publication date: May 22, 2014Applicant: Sony Computer Entertainment Inc.Inventors: Akio Ohba, Hiroyuki Segawa, Hideyuki Saito
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Patent number: 8185683Abstract: Transparency of resources is provided and ordering in an access is guaranteed between nodes on a computer network. In an information processing system in which a plurality of processor units are connected to each other by a switch, a global address space is introduced into which effective addresses of the processor units are mapped and which is shared by the plurality of processor units. In response to an access request packet issued by a processor unit and designating an effective address of a target node, a bridge for routing an input and output bus of a processor unit to an input and output bus of the switch converts the effective address of the target node into a global address by appending to the packet a node identification number identifying the target node, and outputs the access request packet designating the global address to the switch. After an access request packet for a write operation is output, the bridge confirms whether the write operation is completed in a target node.Type: GrantFiled: January 11, 2007Date of Patent: May 22, 2012Assignees: Sony Corporation, Sony Computer Entertainment Inc.Inventors: Takeshi Yamazaki, Hideyuki Saito, Yuji Takahashi, Hideki Mitsubayashi
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Patent number: 8167757Abstract: A plurality of microscopic grooves are created on the surface of the teeth of planetary gears, and thus, irregular unevenness is created. This irregular unevenness includes a plurality of first microscopic grooves which function as lubricant grooves and a plurality of second microscopic grooves which are shallower than the first microscopic grooves.Type: GrantFiled: April 15, 2008Date of Patent: May 1, 2012Assignee: JTEKT CorporationInventors: Junji Ando, Naoyuki Sakai, Hideyuki Saito, Yozo Yamashita
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Patent number: 8095718Abstract: A downstream port 22 of a bridge 20 connecting a processor unit and a peripheral device acknowledges access from the peripheral device via one of a plurality of downstream channels available for access by the peripheral device to a memory of the processor unit, the downstream channels being virtual channels provided for interfacing with the peripheral device. The router 24 routes the access to upstream channels each assigned a memory bandwidth available for access to the memory, the upstream channels being virtual channels supported by the processor unit. In this process, the router refers to a table storing identifiers of the downstream channels and identifiers of the upstream channels in association with each other so as to allocate to the peripheral device the upstream channel corresponding to the downstream channel used by the peripheral device, in response to the access from the peripheral device.Type: GrantFiled: November 30, 2006Date of Patent: January 10, 2012Assignees: Sony Corporation, Sony Computer Entertainment Inc.Inventors: Takeshi Yamazaki, Hideyuki Saito, Yuji Takahashi, Hideki Mitsubayashi
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Patent number: 8006000Abstract: There is provided a technique of accessing a memory of a processor from a peripheral device, thereby the security is ensured while efficiency is being pursued. An address converter 14 includes an address conversion table for converting an effective address into a physical address. The address conversion table stores the effective address to which an area in a memory of a processor unit 10 is allocated to each peripheral device 30 and identification information of an access source to which access permission is given, in association with each other. When the peripheral device 30 accesses, the address converter 14 determines to permit access to the effective address under the condition that the device identification information, included in an access request packet, by which the peripheral device 30 can be uniquely identified, matches the identification information of the access source corresponding to the effective address, in the address conversion table, designated by the access request packet.Type: GrantFiled: January 11, 2007Date of Patent: August 23, 2011Assignees: Sony Corporation, Sony Computer Entertainment Inc.Inventors: Hideyuki Saito, Takeshi Yamazaki, Yuji Takahashi, Hideki Mitsubayashi
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Patent number: 7847485Abstract: A method and a device for artificially generating and showing an aurora and for generating and changing a true-to-life curtain-shaped discharge light emission by using a simple device. In a pressure-reduced chamber, two electrodes are arranged in the X direction and a third electrode is arranged in the Z direction in such a manner that the two electrodes oppose the third electrode and they are apart from each other. A coil generates a magnetic line of force in the Z direction.Type: GrantFiled: July 19, 2006Date of Patent: December 7, 2010Assignee: Iida Home Max Co., Ltd.Inventors: Kazuhiko Mori, Shigeyuki Minami, Yuuji Kurose, Ayumu Watanabe, Yasuhiro Ono, Hideyuki Saito
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Publication number: 20090235048Abstract: Introduced is an end-point bridge that relays an end point—formed by an external bus in a device tree managed by a first processor unit and an end point formed by an external bus in a device tree managed by a second processor unit. A conversion unit in the end-point bridge replaces a requestor ID contained in an access request packet, for example, which has reached the end point, to the ID of the end point from the ID of a host bridge. The ID of the host bridge is stored in a memory in a manner that the ID of the host bridge is associated with a tag of the packet, and is used to return the requestor ID when a response packet to the request reaches the end point.Type: ApplicationFiled: November 8, 2006Publication date: September 17, 2009Applicants: SONY CORPORATION, SONY COMPUTER ENTERTAINMENT INC.Inventors: Hideki Mitsubayashi, Takeshi Yamazaki, Hideyuki Saito, Yuji Takahashi
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Publication number: 20090222610Abstract: A downstream port 22 of a bridge 20 connecting a processor unit and a peripheral device acknowledges access from the peripheral device via one of a plurality of downstream channels available for access by the peripheral device to a memory of the processor unit, the downstream channels being virtual channels provided for interfacing with the peripheral device. The router 24 routes the access to upstream channels each assigned a memory bandwidth available for access to the memory, the upstream channels being virtual channels supported by the processor unit. In this process, the router refers to a table storing identifiers of the downstream channels and identifiers of the upstream channels in association with each other so as to allocate to the peripheral device the upstream channel corresponding to the downstream channel used by the peripheral device, in response to the access from the peripheral device.Type: ApplicationFiled: November 30, 2006Publication date: September 3, 2009Applicants: SONY CORPORATION, SONY COMPUTER ENTERTAINMENT INC.Inventors: Takeshi Yamazaki, Hideyuki Saito, Yuji Takahashi, Hideki Mitsubayashi
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Publication number: 20090216921Abstract: There is provided a technique of accessing a memory of a processor from a peripheral device, thereby the security is ensured while efficiency is being pursued. An address converter 14 includes an address conversion table for converting an effective address into a physical address. The address conversion table stores the effective address to which an area in a memory of a processor unit 10 is allocated to each peripheral device 30 and identification information of an access source to which access permission is given, in association with each other. When the peripheral device 30 accesses, the address converter 14 determines to permit access to the effective address under the condition that the device identification information, included in an access request packet, by which the peripheral device 30 can be uniquely identified, matches the identification information of the access source corresponding to the effective address, in the address conversion table, designated by the access request packet.Type: ApplicationFiled: January 11, 2007Publication date: August 27, 2009Applicants: SONY CORPORATION, SONY COMPUTER ENTERTAINMENT INC.Inventors: Hideyuki Saito, Takeshi Yamazaki, Yuji Takahashi, Hideki Mitsubayashi
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Patent number: 7552270Abstract: An information processing apparatus having a fat tree structure, in which signal transmission across node columns managed by respective processor units is performed through end point bridges included in bridge chips. In this transmission method, the bridge chips perform routing by using node IDs that are given to the respective node columns and levels that indicate the hierarchical depths of the bridge chips, thereby selecting the shortest routes of signals.Type: GrantFiled: January 9, 2007Date of Patent: June 23, 2009Assignee: Sony CorporationInventors: Hideki Mitsubayashi, Takeshi Yamazaki, Hideyuki Saito, Yuji Takahashi
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Publication number: 20090114525Abstract: [Technical Field] A method and a device for artificially generating and showing an aurora. [Problems] To generate and change a true-to-life curtain-shaped discharge light emission by using a simple device. [Means for Solving Problems] As shown in FIG. 1, in a pressure-reduced chamber (1), two electrodes (2) are arranged in X direction and an electrode (3) is arranged in Z direction in such a manner that the two electrodes (2) oppose to the electrode (3) and they are apart from each other. A coil (6) generates a magnetic line of force (m) in the Z direction. [Main Use] Exhibition for public.Type: ApplicationFiled: July 19, 2006Publication date: May 7, 2009Inventors: Mori Kazuhiko, Shigeyuki Minami, Yuuji Kurose, Ayumu Watanabe, Yasuhiro Ono, Hideyuki Saito
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Publication number: 20080261742Abstract: A plurality of microscopic grooves are created on the surface of the teeth of planetary gears, and thus, irregular unevenness is created. This irregular unevenness includes a plurality of first microscopic grooves which function as lubricant grooves and a plurality of second microscopic grooves which are shallower than the first microscopic grooves.Type: ApplicationFiled: April 15, 2008Publication date: October 23, 2008Applicant: JTEKT CorporationInventors: Junji ANDO, Naoyuki Sakai, Hideyuki Saito, Yozo Yamashita
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Publication number: 20070168594Abstract: An information processing apparatus having a fat tree structure, in which signal transmission across node columns managed by respective processor units is performed through end point bridges included in bridge chips. In this transmission method, the bridge chips perform routing by using node IDs that are given to the respective node columns and levels that indicate the hierarchical depths of the bridge chips, thereby selecting the shortest routes of signals.Type: ApplicationFiled: January 9, 2007Publication date: July 19, 2007Inventors: Hideki Mitsubayashi, Takeshi Yamazaki, Hideyuki Saito, Yuji Takahashi
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Patent number: 6851535Abstract: A tuning method for the exciting current-transmission torque characteristic of a power transmission apparatus is provided. A yoke (36), which supports an electromagnet (33), is accommodated in a groove (53) and is apart from the groove by a first distance (L2) and a second distance (L4). The exciting current-transmission torque characteristic is tuned by varying the first distance while keeping the second distance fixed. When the first distance is varied, the variation of the magnetoresistance of a magnetic path is relatively small. Therefore, the exciting current-transmission torque characteristic is more accurately tuned.Type: GrantFiled: August 30, 2001Date of Patent: February 8, 2005Assignee: Toyoda Koki Kabushiki KaishaInventors: Hiroyuki Nakaba, Hideyuki Saito
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Publication number: 20030173180Abstract: A tuning method for the exciting current-transmission torque characteristic of a power transmission apparatus is provided. A yoke (36), which supports an electromagnet (33), is accommodated in a groove (53) and is apart from the groove by a first distance (L2) and a second distance (L4). The exciting current-transmission torque characteristic is tuned by varying the first distance while keeping the second distance fixed. When the first distance is varied, the variation of the magnetoresistance of a magnetic path is relatively small. Therefore, the exciting current-transmission torque characteristic is more accurately tuned.Type: ApplicationFiled: February 10, 2003Publication date: September 18, 2003Inventors: Hiroyuki Nakaba, Hideyuki Saito
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Patent number: 6578684Abstract: A driving force transmission device transmits driving force between an outer case made of magnetic substance and inner shaft. A main clutch mechanism, an electromagnetic type pilot clutch mechanism and cam mechanism are arranged between the outer case and inner shaft. The main clutch mechanism transmits driving force between the outer case and inner shaft. The pilot clutch mechanism controls operation of the main clutch mechanism and comprises an electromagnet, an armature and a friction clutch. The cam mechanism amplifies output of the pilot clutch mechanism and transmits amplified output to the main clutch mechanism. The driving force transmission device further comprises a first regulation member and/or a second regulating member. The first regulating member adjusts a clearance between the cam mechanism and the armature to be more than a predetermined distance. The second regulating member adjusts an axial position of the friction clutch.Type: GrantFiled: July 31, 2001Date of Patent: June 17, 2003Assignee: Toyoda Koki Kabushiki KaishaInventors: Masaji Yamamoto, Hiroshi Takuno, Hideyuki Saito, Takashi Hosokawa, Yoshiaki Senga
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Publication number: 20020033311Abstract: A driving force transmission device transmits driving force between an outer case made of magnetic substance and inner shaft. A main clutch mechanism, an electromagnetic type pilot clutch mechanism and cam mechanism are arranged between the outer case and inner shaft. The main clutch mechanism transmits driving force between the outer case and inner shaft. The pilot clutch mechanism controls operation of the main clutch mechanism and comprises an electromagnet, an armature and a friction clutch. The cam mechanism amplifies output of the pilot clutch mechanism and transmits amplified output to the main clutch mechanism. The driving force transmission device further comprises a first regulation member and/or a second regulating member. The first regulating member adjusts a clearance between the cam mechanism and the armature to be more than a predetermined distance. The second regulating member adjusts an axial position of the friction clutch.Type: ApplicationFiled: July 31, 2001Publication date: March 21, 2002Applicant: TOYODA KOKI KABUSHIKI KAISHAInventors: Masaji Yamamoto, Hiroshi Takuno, Hideyuki Saito, Takashi Hosokawa, Yoshiaki Senga