Abstract: A memory controller includes: a determination part configured to determine a type of a DIMM having a different address line topology based on SPD; a slew rate setting part configured to set a slew rate of an address signal based on the type of the DIMM determined by the determination part; and a delay setting part configured to set a data delay amount when reading/writing data.

Abstract: An image forming apparatus has a photosensitive drum, a charger for uniformly charging a surface of the drum, an optical head for irradiating the surface of the drum with light to change a charging state of the drum surface, and a developing device for causing a toner to adhere on the surface of the drum in accordance with the charging state. The charger has a grid with two wire fixing portions each provided with two grooves, a first discharge wire fitted in one of the two grooves of each wire fixing portion, and a second discharge wire fitted in the other of the two grooves of each wire fixing portion. The two grooves of each wire fixing portion are arranged relative to the grid so that the first and second discharge wires are arranged parallel to one another along a substantial center in a width direction of the grid.

Abstract: In a processing system including a processing apparatus, an input/output apparatus and communication apparatuses, the communication apparatus includes: a first instructing unit that issues a configuration change instruction in accordance with set configuration information to the processing apparatus and the input/output apparatus; and a first setting unit that, when an operation change completion notification corresponding to the configuration change instruction is received, sets the configuration information in accordance with a state established after a configuration change, and each of the processing apparatus and the input/output apparatus includes: a second setting unit that sets the configuration information in accordance with the configuration change instruction received from the communication apparatus; a second instructing unit that issues an operation change instruction in accordance with the set configuration information; and a notifying unit that, when the operation change is completed, issues an

Abstract: Provided is an image forming apparatus which uses a separation claw to separate a recording medium from a photosensitive member without damaging the recording medium even when the recording medium is thin. The employed separation claw fixed to a frame is a flattened plate made of a resin. The separation claw is gradually tapered toward a leading end thereof, and is provided with a slit from the apex toward the frame . The separation claw is not gradually tapered in a thickness direction and has a constant thickness. A plurality of separation claws are fixed to the frame in a length direction of the photosensitive drum so that the recording medium can be separated regardless of the sheet size. The frame is moved to easily adjust the positional relationship between the photosensitive drum and the separation claws.

Abstract: A debug system scans a scan memory element group having a plurality of scan memory elements which are connected in series in a semiconductor integrated circuit device and collects data in the scan memory element group. The semiconductor integrated circuit device has an end code register which is provided between an input terminal and an input side of the scan memory element group and holds an end code, a start code register which is provided between an output terminal and an output side of the scan memory element group and holds a start code, and a scan control circuit which controls shift operations of the scan memory element group, the end code register and the start code register, and outputs scan data to the output terminal.

Abstract: A memory controller receives a read request and also issues a patrol request at a predetermined time interval so as to determine whether any error occurs in data stored in a DIMM. Furthermore, the memory controller generates a patrol address that is the subject of the subsequently issued patrol request. When the memory controller receives a read request, the memory controller compares the patrol address with the read address that is the subject of the received read request. When the read address matches the patrol address, the memory controller cancels the issuance of the subsequent patrol request.

Abstract: A memory controller includes: a determination part configured to determine a type of a DIMM having a different address line topology based on SPD; a slew rate setting part configured to set a slew rate of an address signal based on the type of the DIMM determined by the determination part; and a delay setting part configured to set a data delay amount when reading/writing data.

Abstract: Provided is an image forming apparatus which uses a separation claw to separate a recording medium from a photosensitive member without damaging the recording medium even when the recording medium is thin. The employed separation claw fixed to a frame is a flattened plate made of a resin. The separation claw is gradually tapered toward a leading end thereof, and is provided with a slit from the apex toward the frame . The separation claw is not gradually tapered in a thickness direction and has a constant thickness. A plurality of separation claws are fixed to the frame in a length direction of the photosensitive drum so that the recording medium can be separated regardless of the sheet size. The frame is moved to easily adjust the positional relationship between the photosensitive drum and the separation claws.

Abstract: A separation circuit separates a 32-bit dividend, (e.g., 1695) into 4-bit segments and outputs 9 separated dividends. The position of each dividend counted from the dividend having the lowest bit is i. A first output circuit concatenates at the end of a dividend, 0s of number equal to an integer multiple of 4 bits. Each calculation circuit outputs an 8-bit quotient, a numerical value created by the first output circuit divided by 3(=2n?1 and n=2), and outputs from a second output circuit, a first bit sequence that is the upper 4 bits of the 8-bit quotient, and a second bit sequence in which i sets of lower 4 bits of the 8-bit quotient are arranged. A quotient addition circuit outputs, as a quotient of 1695 divided by 3, the sum of values each including the first bit sequence at upper bits and the second bit sequence at lower bits.

Abstract: An integrated circuit includes a data signal reception unit that receives a data signal transmitted from a transmission circuit, a timing signal reception unit that receives a timing signal transmitted from the transmission circuit and indicating a reading timing of the data signal, a timing adjustment unit that adjusts an output timing of the timing signal received by the timing signal reception unit, a reading unit that reads the data signal received by the data signal reception unit according to an adjusted timing signal of which the output timing is adjusted by the timing adjustment unit, and a voltage value acquisition unit that acquires a voltage value of the data signal received by the data signal reception unit and a voltage value of the adjusted timing signal of which the output timing is adjusted by the timing adjustment unit.

Abstract: Inside a charger for uniformly charging a surface of a photosensitive drum, a wire to which high voltage is applied is stretched. The duration of life of the wire is shorter than that of the photosensitive drum. Therefore, even when other parte are normal, a process cartridge needs to be replaced. In view or this, the charger is removably mounted to the process cartridge, and further, a plurality of wires are arranged inside the charger. Thus, power is selectively fed to the wires depending on the mounting position to the process cartridge. Power is fed only to the selected wire, and hence replacement with a new charger is unnecessary.

Abstract: A control circuit for receiving data transmitted by a data transmitting circuit and transmitting the received data to a data receiving circuit includes: a data receiving unit for receiving the data transmitted by the data transmitting circuit; a packet analyzing unit for judging whether the data received from the data transmitting circuit is a packet including history acquisition information and reading the history acquisition information from the received data; a history acquisition executing unit for starting or stopping acquiring the history information of the transmission and reception of the data according to the history acquisition information read by the packet analyzing unit to store the history information acquired; and a data transmitting unit for transmitting the packet including the history acquisition information or a packet other than the packet including the history acquisition information to the data receiving circuit.

Abstract: An image forming and cutting apparatus has an inkjet head with a first coupling member having a hole, a cutting head with a second coupling member having a hole, and a coupling pin that is received by the holes of the coupling members to couple the first and second coupling members to each other. The coupling pin has first and tapered portions with a columnar portion interposed therebetween. The hole of the first coupling member has a tapered surface for receiving the first tapered portion, and the hole of the second coupling member has a tapered surface portion and a columnar surface portion for receiving the second tapered portion and the columnar portion, respectively.

Abstract: A memory controller which is connected to a memory module having an ECC (Error Check and Correction) function and which controls access to the memory module, the memory controller, has an error detection unit configured to detect an error bit and a position of the error bit by reading, from the memory module, information on codes of the ECCs corresponding to a plurality of read data read from the memory module, a buffer configured to temporarily store the plurality of read data, and a determination unit configured to determine, when the plurality of read data stored in the buffer include a number of data in which a correctable error is detected by the error detection unit and error detection positions of the detected data are the same as each other, that a correctable error is included in a group of the plurality of read data.

Abstract: According to an aspect of the embodiment, a driver outputs a driver current to a reception LSI, and a receiver included in the reception LSI receives an analog voltage signal corresponding to a value of the driver current as a receiver input. An A/D converter converts the voltage signal of the receiver input to a digital value, and transmits the digital value to a driver current controller in a transmission LSI. The driver current controller adjusts a number of PMOS driving stages in the driver or a number of NMOS driving stages in the driver, to make the digital value of the voltage signal of the receiver input belong to a predetermined range.

Abstract: A control circuit of a chip 61 includes a data reception circuit unit 611 that receives data transmitted by a data transmission circuit of another chip, an error information extraction unit 613 that detects error information of the received data, and a data transmission circuit unit 617 that attaches, when the error information extraction unit 613 detected error information, the detected error information to the received data, and transmits the data to which the error information is attached, to a data reception circuit of another chip.

Abstract: According to an aspect of the embodiment, a driver outputs a driver current to a reception LSI, and a receiver included in the reception LSI receives an analog voltage signal corresponding to a value of the driver current as a receiver input. An A/D converter converts the voltage signal of the receiver input to a digital value, and transmits the digital value to a driver current controller in a transmission LSI. The driver current controller adjusts a number of PMOS driving stages in the driver or a number of NMOS driving stages in the driver, to make the digital value of the voltage signal of the receiver input belong to a predetermined range.

Abstract: A control circuit for receiving data transmitted by a data transmitting circuit and transmitting the received data to a data receiving circuit includes: a data receiving unit for receiving the data transmitted by the data transmitting circuit; a packet analyzing unit for judging whether the data received from the data transmitting circuit is a packet including history acquisition information and reading the history acquisition information from the received data; a history acquisition executing unit for starting or stopping acquiring the history information of the transmission and reception of the data according to the history acquisition information read by the packet analyzing unit to store the history information acquired; and a data transmitting unit for transmitting the packet including the history acquisition information or a packet other than the packet including the history acquisition information to the data receiving circuit.

Abstract: A circuit synchronizes parallel data of different timing for transfer. The synchronous data transfer circuit includes a plurality of first flip-flop circuits in which the parallel data are set by a data strobe signal, a plurality of delay circuits, and a plurality of second flip-flop circuits. By configuring the second flip-flop circuits to share generation of a delay amount, the second flip-flop circuits are utilized for data synchronization by the synchronous data transfer circuit. Thus, it becomes possible to configure the delay circuits with a remarkably reduced amount of delay elements.

Abstract: Provided is an image forming and image cutting apparatus that may suppress vibrations occurring at a time of coupling an inkjet head and a cutting head, and does not require a large force at a time of separation, thereby making it possible to achieve downsizing of a drive motor for the inkjet head or the cutting head. In the image forming and image cutting apparatus, a first coupling member attached to the inkjet head and a second coupling member attached to the cutting head are coupled and separated by using a coupling pin which may be moved according to driving of a solenoid attached to the cutting head.