Patents by Inventor Hideyuki Sandoh
Hideyuki Sandoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230066651Abstract: An outer circumferential region of a metal film and a portion of an outer circumferential region of a substrate on a reverse side thereof are removed, thereby exposing the outer circumferential region of the substrate and creating on a reverse side of an outer circumferential region of the wafer an exposed surface where a portion closer to a face side of a wafer is located outwardly of a portion remoter from the face side of the wafer. When a tape is affixed to a reverse side of the wafer, no gap or a reduced gap is formed between the tape and the outer circumferential region of the wafer. As a result, problems are restrained from occurring when the wafer is divided to manufacture chips therefrom.Type: ApplicationFiled: August 11, 2022Publication date: March 2, 2023Inventor: Hideyuki SANDOH
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Patent number: 11495466Abstract: A processing method of a wafer includes a resist film coating step of coating either one surface of a front surface and a back surface with a resist film containing an ultraviolet absorber, a laser beam irradiation step of irradiating the side of the one surface with a laser beam absorbed by the wafer and removing part of the wafer and the resist film along planned dividing lines, a plasma etching step of supplying a gas in a plasma state to the side of the one surface and removing an exposed region of the wafer exposed along the planned dividing lines through plasma etching, and a check step of irradiating plural positions on the side of the one surface of the wafer with ultraviolet rays and detecting light emission of the resist film to measure the thickness of the resist film and check a coating state of the resist film.Type: GrantFiled: October 2, 2020Date of Patent: November 8, 2022Assignee: DISCO CORPORATIONInventors: Hideyuki Sandoh, Minoru Suzuki
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Publication number: 20220028742Abstract: A method of processing a wafer includes a wafer preparing step of preparing a measurement wafer and a product wafer, a measurement etching step of supplying a gas in a plasma state to first areas of the measurement wafer that correspond to streets thereon to form grooves in the measurement wafer, a measuring step of demarcating a plurality of concentric areas in an array from a center to an outer circumference of the measurement wafer, and measuring depths of the grooves in the respective concentric areas, a thickness adjusting step of adjusting a thickness of the product wafer such that the product wafer is progressively thinner in areas thereof that correspond to the areas of the measurement wafer where the grooves are shallower, and an etching step of supplying a gas in a plasma state to second areas of the product wafer that correspond to streets thereon.Type: ApplicationFiled: July 20, 2021Publication date: January 27, 2022Inventors: Karl Heinz PRIEWASSER, Hideyuki SANDOH
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Patent number: 11056346Abstract: There is provided a wafer processing method for reducing a thickness of a wafer. The wafer has a front side and a back side opposite to the front side. The wafer has a device area where a plurality of devices are formed on the front side and a peripheral marginal area including a curved peripheral edge. A protective layer for covering the plural devices are formed on the front side in the device area. The wafer processing method includes a plasma etching step of supplying an etching gas in a plasma condition to the front side of the wafer by using the protective layer as a mask, thereby removing the peripheral marginal area including the curved peripheral edge, a protective member attaching step of attaching a protective member to the front side of the wafer, and a grinding step of grinding the back side of the wafer.Type: GrantFiled: August 21, 2020Date of Patent: July 6, 2021Assignee: DISCO CORPORATIONInventors: Hideyuki Sandoh, Ichiro Yamahata, Tomotaka Tabuchi
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Publication number: 20210104408Abstract: A processing method of a wafer includes a resist film coating step of coating either one surface of a front surface and a back surface with a resist film containing an ultraviolet absorber, a laser beam irradiation step of irradiating the side of the one surface with a laser beam absorbed by the wafer and removing part of the wafer and the resist film along planned dividing lines, a plasma etching step of supplying a gas in a plasma state to the side of the one surface and removing an exposed region of the wafer exposed along the planned dividing lines through plasma etching, and a check step of irradiating plural positions on the side of the one surface of the wafer with ultraviolet rays and detecting light emission of the resist film to measure the thickness of the resist film and check a coating state of the resist film.Type: ApplicationFiled: October 2, 2020Publication date: April 8, 2021Inventors: Hideyuki SANDOH, Minoru SUZUKI
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Publication number: 20210078101Abstract: A processing apparatus includes a chuck table for sucking and holding a workpiece and a camera unit imaging the workpiece. The chuck table includes a light passing portion that passes light. The light passing portion includes a first region that overlaps with the workpiece and has a first mirror face that reflects light that advances from the first region into the light passing portion. The camera unit can image the workpiece by detecting light reflected by the first mirror face after having been reflected by the workpiece held by the chuck table and advanced into the light passing portion.Type: ApplicationFiled: September 10, 2020Publication date: March 18, 2021Inventor: Hideyuki SANDOH
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Publication number: 20210057225Abstract: There is provided a wafer processing method for reducing a thickness of a wafer. The wafer has a front side and a back side opposite to the front side. The wafer has a device area where a plurality of devices are formed on the front side and a peripheral marginal area including a curved peripheral edge. A protective layer for covering the plural devices are formed on the front side in the device area. The wafer processing method includes a plasma etching step of supplying an etching gas in a plasma condition to the front side of the wafer by using the protective layer as a mask, thereby removing the peripheral marginal area including the curved peripheral edge, a protective member attaching step of attaching a protective member to the front side of the wafer, and a grinding step of grinding the back side of the wafer.Type: ApplicationFiled: August 21, 2020Publication date: February 25, 2021Inventors: Hideyuki SANDOH, Ichiro YAMAHATA, Tomotaka TABUCHI
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Publication number: 20210043474Abstract: A plasma etching apparatus for processing a workpiece of a frame unit including the workpiece formed with division start points or division grooves along a plurality of mutually intersecting streets, and a frame that has an opening and that supports the workpiece on inside of the opening through an expanding tape includes a plasma etching unit that has a chuck table for holding the workpiece on a holding surface through the expanding tape and that supplies a plasmatized gas to the workpiece held by the chuck table, and an expanding unit that expands the expanding tape to divide the workpiece along the division start points or to widen a width of the division grooves.Type: ApplicationFiled: August 3, 2020Publication date: February 11, 2021Inventors: Masatoshi WAKAHARA, Hideyuki SANDOH
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Patent number: 10811458Abstract: A method of processing a wafer having devices disposed in respective regions demarcated on a front face thereof by a grid of a plurality of projected dicing lines on the front face, the method includes a mask layer forming step of covering the front face of the wafer except for the regions where grooves are to be formed along the projected dicing lines with a resin material mixed with an ultraviolet ray absorber, and forming a mask layer on the front face of the wafer, a plasma etching step of performing plasma etching on the wafer from the mask layer side using a fluorine-based stable gas as an etching gas, and forming grooves in the wafer along the projected dicing lines, and a mask layer removing step of removing the mask layer after the plasma etching step is performed.Type: GrantFiled: October 4, 2018Date of Patent: October 20, 2020Assignee: DISCO CORPORATIONInventors: Ryugo Oba, Yukinobu Ohura, Hideyuki Sandoh
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Patent number: 10410923Abstract: A method of processing a wafer includes forming a mask on portions of a face side of the wafer which correspond to devices; performing plasma etching on the face side of the wafer through the mask to etch areas of streets other than areas thereof corresponding to metal components, thereby forming grooves in the areas of the streets to a depth corresponding to a finished thickness of device chips; bonding a protective member for protecting the face side of the wafer, holding the face side of the wafer on a chuck table through the protective member and grinding a reverse side of the wafer until bottoms of the grooves are exposed, to fragmentize the wafer into the device chips; and picking up the device chips from the protective member, leaving remaining regions of the substrate which correspond to the metal components on the protective member.Type: GrantFiled: September 15, 2017Date of Patent: September 10, 2019Assignee: DISCO CORPORATIONInventor: Hideyuki Sandoh
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Publication number: 20190109173Abstract: A method of processing a wafer having devices disposed in respective regions demarcated on a front face thereof by a grid of a plurality of projected dicing lines on the front face, the method includes a mask layer forming step of covering the front face of the wafer except for the regions where grooves are to be formed along the projected dicing lines with a resin material mixed with an ultraviolet ray absorber, and forming a mask layer on the front face of the wafer, a plasma etching step of performing plasma etching on the wafer from the mask layer side using a fluorine-based stable gas as an etching gas, and forming grooves in the wafer along the projected dicing lines, and a mask layer removing step of removing the mask layer after the plasma etching step is performed.Type: ApplicationFiled: October 4, 2018Publication date: April 11, 2019Inventors: Ryugo OBA, Yukinobu OHURA, Hideyuki SANDOH
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Publication number: 20180330957Abstract: Disclosed herein is a workpiece processing method including a mask preparing step of preparing a mask that covers devices on a front surface of a workpiece and exposes streets, a plasma etching step of repeating an operation of supplying plasmatized SF6 through the mask to the workpiece accompanied by a holding member disposed on a back surface thereof, to form grooves, then supplying plasmatized C4F8 to the workpiece through the mask to deposit a coating on the workpiece, and thereafter supplying plasmatized SF6 to the workpiece through the mask to remove the coating present at bottoms of the grooves, thereby etching the groove bottoms, and a foreign matter removing step of cleaning the workpiece with a cleaning liquid, after the plasma etching step is conducted, to remove the coating produced in the plasma etching step.Type: ApplicationFiled: May 8, 2018Publication date: November 15, 2018Inventors: Frank Wei, Tomotaka Tabuchi, Hideyuki Sandoh
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Patent number: 10083867Abstract: A method of processing a wafer having a metal film formed on a reverse side thereof includes removing a metal film on the reverse side of the wafer along an outer circumferential edge of the wafer, thereby exposing a substrate of the wafer along the outer circumferential edge thereof, detecting a projected dicing line on a face side of the wafer with an infrared camera through the substrate exposed along the outer circumferential edge of the wafer and performing alignment of the wafer based on the detected projected dicing line, removing the metal film on the reverse side of the wafer along the detected projected dicing line, and thereafter, forming dividing grooves in the substrate along the projected dicing lines by plasma etching, thereby dividing the wafer into individual device chips.Type: GrantFiled: August 17, 2017Date of Patent: September 25, 2018Assignee: Disco CorporationInventor: Hideyuki Sandoh
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Publication number: 20180096892Abstract: A device wafer processing method includes forming a mask patterned so as to cover plural devices formed on a front side of the wafer and expose streets between the devices, applying plasma through the mask to thereby form a groove along each street, the groove having a depth corresponding to a finished thickness of the devices and having a reverse tapering shape such that the distance between opposed side walls of the groove is increased with an increase in depth of the groove, removing the mask, attaching a protective member to the front side of the wafer, and then grinding a back side of the wafer until the bottom of the groove is exposed, thereby reducing the thickness of the wafer to the finished thickness to divide the wafer into a plurality of device chips.Type: ApplicationFiled: September 29, 2017Publication date: April 5, 2018Inventor: Hideyuki Sandoh
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Publication number: 20180076088Abstract: A method of processing a wafer includes forming a mask on portions of a face side of the wafer which correspond to devices; performing plasma etching on the face side of the wafer through the mask to etch areas of streets other than areas thereof corresponding to metal components, thereby forming grooves in the areas of the streets to a depth corresponding to a finished thickness of device chips; bonding a protective member for protecting the face side of the wafer, holding the face side of the wafer on a chuck table through the protective member and grinding a reverse side of the wafer until bottoms of the grooves are exposed, to fragmentize the wafer into the device chips; and picking up the device chips from the protective member, leaving remaining regions of the substrate which correspond to the metal components on the protective member.Type: ApplicationFiled: September 15, 2017Publication date: March 15, 2018Inventor: Hideyuki Sandoh
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Publication number: 20180068895Abstract: A method of processing a wafer having a metal film formed on a reverse side thereof includes removing a metal film on the reverse side of the wafer along an outer circumferential edge of the wafer, thereby exposing a substrate of the wafer along the outer circumferential edge thereof, detecting a projected dicing line on a face side of the wafer with an infrared camera through the substrate exposed along the outer circumferential edge of the wafer and performing alignment of the wafer based on the detected projected dicing line, removing the metal film on the reverse side of the wafer along the detected projected dicing line, and thereafter, forming dividing grooves in the substrate along the projected dicing lines by plasma etching, thereby dividing the wafer into individual device chips.Type: ApplicationFiled: August 17, 2017Publication date: March 8, 2018Inventor: Hideyuki Sandoh
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Patent number: 7222772Abstract: A flip chip bonder including a substrate holding mechanism and a chip die bonder for bonding a semiconductor chip having a plurality of electrodes projecting from its front surface to a substrate held on the substrate holding means. The flip chip bonder includes a chuck table, a semiconductor chip take-out area and an electrode cutting area, a cutting mechanism having a cutting tool for cutting the plurality of electrodes projecting from the front surface of the semiconductor chip held on the chuck table and arranged in the electrode cutting area to make them uniform in height, a semiconductor chip take-in mechanism, and a semiconductor chip conveying mechanism.Type: GrantFiled: April 9, 2004Date of Patent: May 29, 2007Assignee: Disco CorporationInventors: Kazuhisa Arai, Takashi Mori, Hideyuki Sandoh, Shinichi Namioka
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Publication number: 20040206800Abstract: A flip chip bonder comprising substrate holding means and a chip die bonder for bonding a semiconductor chip having a plurality of electrodes projecting from its front surface to a substrate held on the substrate holding means, whereinType: ApplicationFiled: April 9, 2004Publication date: October 21, 2004Inventors: Kazuhisa Arai, Takashi Mori, Hideyuki Sandoh, Shinichi Namioka
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Publication number: 20040208718Abstract: A machine for making a plurality of electrodes projecting from the front surface of a plate-like workpiece uniform in height, comprising a chuck table having a placing surface for placing the plate-like workpiece, which can be moved between a workpiece take-in/take-out area and a processing area, a chuck table moving unit for moving the chuck table between the workpiece take-in/take-out area and the processing area, a cutting unit having a cutting tool for cutting a plurality of electrodes projecting from the front surface of the plate-like workpiece arranged in the processing area and held on the chuck table to make them uniform in height, a cutting unit feed mechanism for moving the cutting unit in a direction perpendicular to the placing surface of the chuck table, a take-in means for carrying the plate-like workpiece before processing to the chuck table positioned in the workpiece take-in/take-out area; and a take-out means for taking out the plate-like workpiece after processing held on the chuck table pType: ApplicationFiled: April 9, 2004Publication date: October 21, 2004Inventors: Kazuhisa Arai, Takashi Mori, Hideyuki Sandoh, Shinichi Namioka