Patents by Inventor HIDEYUKI SATOU

HIDEYUKI SATOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136274
    Abstract: A quantum device capable of effectively cooling a quantum chip and an area (e.g., a space) therearound is provided. A quantum device includes a quantum chip and an interposer on which the quantum chip is located. The interposer includes an interposer substrate and an interposer wiring layer. The interposer wiring layer is disposed on a surface of the interposer substrate on a side on which the quantum chip is located. The interposer wiring layer includes, in at least a part thereof, a superconducting material layer formed of a superconducting material and a non-superconducting material layer formed of a non-superconducting material.
    Type: Application
    Filed: July 26, 2023
    Publication date: April 25, 2024
    Applicant: NEC Corporation
    Inventors: Katsumi KIKUCHI, Akira MIYATA, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Kenji NANBA, Ayami YAMAGUCHI
  • Patent number: 11871682
    Abstract: A quantum device (100) includes: an interposer (112); a quantum chip (111); a first connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111); and a second connection part (140) that is provided on a main surface of the interposer (112) where the first connection part (130) is arranged and is connected to a cooling plate (115).
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: January 9, 2024
    Assignee: NEC CORPORATION
    Inventors: Kenji Nanba, Ayami Yamaguchi, Akira Miyata, Katsumi Kikuchi, Suguru Watanabe, Takanori Nishi, Hideyuki Satou
  • Publication number: 20240003959
    Abstract: In an insulation inspection method for detecting creeping discharge that occurs in a coil in an armature, a predetermined impulse voltage is applied to the coil, and an electrical current value of a current that flows to a current detector that is connected to the coil is detected. The detected electrical current value is analyzed to acquire a relationship between a frequency and an electrical current value spectrum in the detected electrical current value. Based on the acquired relationship, a total sum of electrical current value spectrum areas in a high-frequency band is calculated as a high-frequency spectrum area. The high-frequency band differs from a predetermined low-frequency band in which partial discharge that occurs in a portion of a thin coating of the wire configuring the coil can be detected. Based on a magnitude of the calculated high-frequency spectrum area, creeping discharge that occurs in the coil is detected.
    Type: Application
    Filed: June 27, 2023
    Publication date: January 4, 2024
    Applicants: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, AISIN CORPORATION
    Inventors: Yuki KOSAKA, Hideyuki SATOU, Hideaki KIMURA
  • Patent number: 11805708
    Abstract: A quantum device according to an example embodiment includes a quantum chip 10, and an interposer 20 on which the quantum chip 10 is mounted, in which the interposer 20 includes a conductive wiring line CL1 electrically connected to the quantum chip 10, a mounting surface 21 of the interposer 20 on which the quantum chip 10 is mounted or an opposite surface 22 opposite to the mounting surface 21 includes a first area AR11 and a second area AR12 different from the first area AR11 as viewed in a direction perpendicular to the mounting surface 21 or the opposite surface 22, the conductive wiring line CL1 is disposed in the first area AR11 on the mounting surface 21 or the opposite surface 22, and a movable member 60 is in contact with the second area AR12 of the interposer 20.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: October 31, 2023
    Assignee: NEC CORPORATION
    Inventors: Katsumi Kikuchi, Akira Miyata, Suguru Watanabe, Takanori Nishi, Hideyuki Satou, Kenji Nanba, Ayami Yamaguchi
  • Publication number: 20230345844
    Abstract: Provided is a quantum device capable of improving cooling performance. A quantum device includes a quantum chip configured to perform information processing using a quantum state, and an interposer on which the quantum chip is mounted, and the quantum chip is arranged inside a recess 31 formed in a sample stage having a cooling function, and a part of the interposer is in contact with the sample stage. The quantum chip may have a first surface mounted on the interposer and a second surface opposite to the first surface, and at least a part of the second surface may be in contact with an inner surface of the recess.
    Type: Application
    Filed: June 5, 2020
    Publication date: October 26, 2023
    Applicant: NEC Corporation
    Inventors: Katsumi KIKUCHI, Akira MIYATA, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Kenji NANBA, Ayami YAMAGUCHI
  • Patent number: 11798895
    Abstract: A quantum device (100) includes an interposer (112), a quantum chip (111) mounted on the interposer (112), and a shield part (150) provided so as to surround a quantum circuit region of the interposer (112) and the quantum chip (111). Accordingly, the quantum device (100) is able to prevent interference in the quantum circuit region due to exogenous noise.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: October 24, 2023
    Assignee: NEC CORPORATION
    Inventors: Kenji Nanba, Ayami Yamaguchi, Akira Miyata, Katsumi Kikuchi, Suguru Watanabe, Takanori Nishi, Hideyuki Satou
  • Publication number: 20230308059
    Abstract: A power amplifier circuit includes a first amplification element having an output terminal and amplifying a harmonic signal input to an input terminal, a second amplification element having an output terminal and amplifying a harmonic signal input to an input terminal, a bias circuit that supplies a bias to each of the input terminal of the first amplification element and the second amplification element, a first resistance element electrically connected to the output terminal of the first amplification element, and a second resistance element electrically connected to the output terminal of the second amplification element and electrically connected to the other end of the first resistance element in series, the bias circuit is electrically connected to a connection point in a portion in which the other end of the first resistance element and the other end of the second resistance element are electrically connected in series.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Inventors: Yuri HONDA, Hideyuki SATOU, Satoshi TANAKA
  • Publication number: 20230276717
    Abstract: Provided are an oscillator and a quantum computer capable of suppressing an occupied area of a circuit. An oscillator (300) includes a resonator (100) including a plurality of loop circuits in which a first superconducting line (112a), a first Josephson junction (111a), a second superconducting line (112b), and a second Josephson junction (111b) are annularly connected, and a magnetic field application circuit (200) including an electrode that goes around in a predetermined shape and configured to apply a magnetic field to the loop circuit, in which the electrode is arranged so as to face at least two of the loop circuits.
    Type: Application
    Filed: June 5, 2020
    Publication date: August 31, 2023
    Applicant: NEC Corporation
    Inventors: Akira MIYATA, Katsumi KIKUCHI, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Tomohiro YAMAJI, Tsuyoshi YAMAMOTO, Yoshihito HASHIMOTO
  • Publication number: 20230256164
    Abstract: A flow stop assembly is attachable to an infusion pump and includes: a tube receiving portion comprising a fixing portion configured to be fixed to the infusion pump; and a tube pressing portion coupled to the tube receiving portion via a hinge and rotationally displaceable with respect to the tube receiving portion around a rotation axis. The fixing portion is fixable to the infusion pump in a state in which an infusion tube is inserted between the tube receiving portion and the tube pressing portion.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 17, 2023
    Applicant: TERUMO KABUSHIKI KAISHA
    Inventors: Shun DEMIZU, Koshi SANO, Hideyuki SATOU
  • Publication number: 20230237362
    Abstract: Provided is a quantum device capable of suppressing reduction in performance of quantum bit even when a quantum chip is flip-chip mounted on an interposer. A quantum chip (10) is flip-chip mounted on an interposer (20) by a bump (30). A coplanar line (12) coupling adjacent quantum bits is formed on the quantum chip (10). A gap (22) is provided, in the interposer (20), at a location facing a center conductor (12a) of the coplanar line (12). A second ground electrode (24) is formed around gap (22). The interposer (20) has a connection electrode (40) connecting the second ground electrode (24) around the gap (22). A bump (30A) formed in the vicinity of the connection electrode (40) is connected to the first ground electrode (12b) and the second ground electrode (24).
    Type: Application
    Filed: June 5, 2020
    Publication date: July 27, 2023
    Applicant: NEC Corporation
    Inventors: Akira MIYATA, Katsumi KIKUCHI, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Tomohiro YAMAJI, Tsuyoshi YAMAMOTO, Yoshihito HASHIMOTO
  • Patent number: 11696517
    Abstract: A quantum device (100) includes: an interposer (112); a quantum chip (111); and a connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111), in which the connection part (130) includes: a plurality of pillars (131) arranged on a main surface of the interposer (112); and a metal film (132) provided on a surface of the plurality of pillars (131) in such a way that it contacts the wiring layer of the quantum chip (111) and the thickness of the metal film at outer peripheral parts of the tip of each of the plurality of pillars (131) becomes larger than the thickness of the metal film at a center part of the tip of each of the plurality of pillars (131).
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: July 4, 2023
    Assignee: NEC CORPORATION
    Inventors: Kenji Nanba, Ayami Yamaguchi, Akira Miyata, Katsumi Kikuchi, Suguru Watanabe, Takanori Nishi, Hideyuki Satou
  • Patent number: 11309842
    Abstract: A power amplifier circuit includes a first path and a second path between an input terminal and an output terminal, a first amplifier located in the first path operative in a first mode, a second amplifier located in the second path operative in a second mode, a first matching circuit between the first amplifier and the output terminal in the first path, a first capacitor having a first end connected to the output terminal side of the first matching circuit, and a second end, a first inductor having a first end connected to the second end of the first capacitor and a second end grounded, and a short-circuit switch connected in parallel with the first inductor. The short-circuit switch short-circuits the first and second ends of the first inductor in the first mode and is placed in an open-circuit position in the second mode.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: April 19, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Hisanori Namie, Hideyuki Satou, Yoshiaki Sukemori
  • Publication number: 20220098041
    Abstract: An object of the present invention is to provide a member and a method for producing a fibrous carbon nanohorn aggregate with high efficiency.
    Type: Application
    Filed: January 27, 2020
    Publication date: March 31, 2022
    Applicant: NEC Corporation
    Inventors: Ryota YUGE, Hideyuki SATOU
  • Publication number: 20220036229
    Abstract: A quantum device includes a quantum chip and a holder. The holder includes a pedestal, a recess portion formed in a main surface of the pedestal so as to be opposed to the quantum chip, and a suction tube provided such that in the recess portion, a suction opening is positioned in a bottom surface of the quantum chip.
    Type: Application
    Filed: July 14, 2021
    Publication date: February 3, 2022
    Applicant: NEC Corporation
    Inventors: Tomohiro Yamaji, Hideyuki Satou, Yoshihito Hashimoto, Aiko Uchiyama
  • Publication number: 20210408358
    Abstract: A quantum device (100) includes: an interposer (112); a quantum chip (111); a first connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111); a predetermined signal line (w1) arranged in the wiring layer of the quantum chip (111); first shield wires (ws1) arranged in the wiring layer of the quantum chip (111) along the predetermined signal line (w1); a second shield wire (ws2) arranged in the wiring layer of the interposer (112); and a second connection part (150) that is provided between the interposer (112) and the quantum chip (111) so as to contact the first shield wires (ws1) and the second shield wire (ws2).
    Type: Application
    Filed: June 23, 2021
    Publication date: December 30, 2021
    Applicant: NEC Corporation
    Inventors: Kenji Nanba, Ayami Yamaguchi, Akira Miyata, Katsumi Kikuchi, Suguru Watanabe, Takanori Nishi, Hideyuki Satou
  • Publication number: 20210407928
    Abstract: A quantum device (100) includes an interposer (112), a quantum chip (111) mounted on the interposer (112), and a shield part (150) provided so as to surround a quantum circuit region of the interposer (112) and the quantum chip (111). Accordingly, the quantum device (100) is able to prevent interference in the quantum circuit region due to exogenous noise.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 30, 2021
    Applicant: NEC Corporation
    Inventors: Kenji NANBA, Ayami YAMAGUCHI, Akira MIYATA, Katsumi KIKUCHI, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU
  • Publication number: 20210408354
    Abstract: To provide a quantum device capable of preventing a connection member connecting a quantum chip with an interposer from being broken. The quantum device 1 includes at least one quantum chip 10, at least one interposer 20 on which the at least one quantum chip 10 is mounted, and a plurality of connection members 30 formed of a conductor. The plurality of connection members 30 are disposed between the quantum chip 10 and the interposer 20, and connect the quantum chip 10 with the interposer 20. The size of the connection member 30 on the surface along the mounting surface 20s of the interposer 20 is changed according to the position thereof relative to the quantum chip 10.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 30, 2021
    Applicant: NEC Corporation
    Inventors: Katsumi KIKUCHI, Akira MIYATA, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Kenji NANBA, Ayami YAMAGUCHI
  • Patent number: 11211899
    Abstract: A power amplifying circuit includes a bias circuit that supplies a bias current or a bias voltage to a base of a first transistor, and at least one termination circuit that short-circuits a second-order harmonic of an amplified signal output from a collector of the first transistor to a ground voltage. An emitter of the first transistor is connected to ground. The bias circuit includes a second transistor. A collector of the second transistor is connected to the base of the first transistor. An emitter of the second transistor is connected to the emitter of the first transistor. A base of the second transistor is supplied with a predetermined voltage.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: December 28, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hideyuki Satou
  • Publication number: 20210399193
    Abstract: A quantum device (100) includes: an interposer (112); a quantum chip (111); a first connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111); and a second connection part (140) that is provided on a main surface of the interposer (112) where the first connection part (130) is arranged and is connected to a cooling plate (115).
    Type: Application
    Filed: June 16, 2021
    Publication date: December 23, 2021
    Applicant: NEC Corporation
    Inventors: Kenji NANBA, Ayami YAMAGUCHI, Akira MIYATA, Katsumi KIKUCHI, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU
  • Publication number: 20210399196
    Abstract: A quantum device capable of securing terminals for external connection is provided. A quantum device according to an example embodiment includes a quantum chip 10, an interposer 20 on which the quantum chip 10 is mounted, and a socket 40 disposed so as to be opposed to the interposer 20, the socket 40 comprising a movable pin 47 and a housing 45 supporting the movable pin 47, in which at least one end of the movable pin 47, which includes the one end and the other end opposite to the one end, is movable relative to the housing 45, the one end being in electrical contact with a terminal of the interposer 20, and the other end is in an electrical contact with a terminal of a board 50 on which a connector 51 is formed, the connector 51 being configured to serve as an external input/output.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 23, 2021
    Applicant: NEC Corporation
    Inventors: Katsumi KIKUCHI, Akira MIYATA, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Kenji NANBA, Ayami YAMAGUCHI