Patents by Inventor Hideyuki Wada

Hideyuki Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11122175
    Abstract: A document reading apparatus of a printing apparatus includes a document setting unit and a reading unit, the document reading apparatus being provided at a higher position compared to a printing unit. The document setting unit includes a supporting surface configured to support a document, and the reading unit is configured to read the document conveyed from the document setting unit. The document reading apparatus moves to a reading position and to a retracted position at which the document reading apparatus is retracted from the reading position. Furthermore, the printing apparatus includes a cover member configured to cover the printing unit. The cover member includes an outer surface configured to support and guide the document together with the supporting surface in a case where the document reading apparatus is at the reading position.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: September 14, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takakazu Ohashi, Hideyuki Nozawa, Itaru Wada, Ryo Harigae
  • Patent number: 11018441
    Abstract: A high gain of an antenna is achieved while suppressing interference of a radio wave from an RFIC. A plurality of serial-type radiation element rows 41 are arranged in parallel. A parallel feed line 45 branches from a feed terminal of an electronic component 11, and connects radiation elements 42, at ends of the serial-type radiation element row 41 farthest from the electronic component 11, to the feed terminal of the electronic component 11. All of the serial-type radiation element rows have an identical path length, along the parallel feed line 45, from each of the radiation elements 42 at the ends farthest from the electronic component 11 to the feed terminal of the electronic component 11. An amplifier 61 is connected to the parallel feed line on a halfway portion of the parallel feed line 45. The amplifier 61 amplifies a signal passing through the parallel feed line 45.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: May 25, 2021
    Assignee: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Publication number: 20210076903
    Abstract: An endoscope system includes an endoscope including at least one switch, each of which can be assigned two functions, and a controller. The controller sets a plurality of function pairs, each of which is composed of a combination of any one of a plurality of first functions and any one of a plurality of second functions, and assigns one function pair selected from the plurality of function pairs to the switch, measures a switch pressing time period after the switch is pressed, and executes the first function when the switch pressing is released before a predetermined first time period elapses after the switch is pressed and executes the second function when the switch pressing time period passes the first time period.
    Type: Application
    Filed: November 27, 2020
    Publication date: March 18, 2021
    Applicant: OLYMPUS CORPORATION
    Inventors: Takeshi URASAKI, Koichi NIIDA, Masaki KONDO, Takuya OGURA, Aki MATSUMOTO, Ryunosuke MATSUSHIGE, Satoru ONO, Takahiro YUMOTO, Hideyuki WADA, Sachiko HASHIMOTO, Tomomi OUCHI
  • Publication number: 20210066815
    Abstract: A high gain of an antenna is achieved while suppressing interference of a radio wave from an RFIC. A plurality of serial-type radiation element rows 41 are arranged in parallel. A parallel feed line 45 branches from a feed terminal of an electronic component 11, and connects radiation elements 42, at ends of the serial-type radiation element row 41 farthest from the electronic component 11, to the feed terminal of the electronic component 11. All of the serial-type radiation element rows have an identical path length, along the parallel feed line 45, from each of the radiation elements 42 at the ends farthest from the electronic component 11 to the feed terminal of the electronic component 11. An amplifier 61 is connected to the parallel feed line on a halfway portion of the parallel feed line 45. The amplifier 61 amplifies a signal passing through the parallel feed line 45.
    Type: Application
    Filed: May 16, 2018
    Publication date: March 4, 2021
    Applicant: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Publication number: 20200153114
    Abstract: A planar array antenna 20 includes: a dielectric substrate; a conductive ground layer 37 formed on one surface of the dielectric substrate; a plurality of serial-type radiation element rows 41 formed on another surface of the dielectric substrate; and a parallel feed line that is formed on the other surface of the dielectric substrate and supplies high-frequency electric power between a feed end point 45s on the other surface of the dielectric substrate and the serial-type radiation element rows 41. The parallel feed line 45 branches from the feed end point 45s to the radiation elements 42 at ends of the serial-type radiation element rows closest to the feed end point 45s, and connects the feed end point 45s to the radiation elements 42, and all of the serial-type radiation element rows 41 an identical path length from the feed end point 45s to each of the radiation elements 42.
    Type: Application
    Filed: February 28, 2018
    Publication date: May 14, 2020
    Applicant: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Publication number: 20200128661
    Abstract: Realized is a multilayer substrate and a multilayer substrate array, each of which has a high degree of freedom in a production method. At least part of an outer periphery (51) of a multilayer substrate (100), which includes a wiring provided on an inner layer, is processed so as to have a wave shape.
    Type: Application
    Filed: April 4, 2018
    Publication date: April 23, 2020
    Applicant: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Patent number: 10386665
    Abstract: The present disclosure describes increasing a maximum angle of incidence and a maximum angle of output, of an optical element package, with respect to an optical element contained therein, the optical element being reflective. A sealing resin (5) is filled into a gap between an LCOS element (2) and a package housing (1). The sealing resin (5) covers side surfaces (2s) and a rear surface (2b) of the LCOS element (2).
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: August 20, 2019
    Assignee: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Patent number: 10295852
    Abstract: An optical device includes a window glass plate with which a window of a lid section is provided and which is connected to the lid section via a solder layer so that an internal space of the optical device is hermetically sealed. The solder layer has a void which is isolated from an external space and an internal space of the optical device.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: May 21, 2019
    Assignee: FUJIKURA LTD.
    Inventors: Hideyuki Wada, Shinichi Sakamoto, Kohei Matsumaru
  • Patent number: 10139700
    Abstract: An optical device includes a housing part that includes an open window disposed inside the housing part, an optical element into which light enters via the window, and a window glass plate that blocks the window. The window glass plate includes a light-transmissive base material and a metal coating film provided on an outer peripheral part of the light-transmissive base material. The window glass plate is fixed to the housing part with a solder layer provided between the metal coating film and the housing part. The housing part includes an edge part located toward the window, and the edge part includes an overhanging part that protrudes further than an inner peripheral-side edge part of the metal coating film in a direction toward a center part of the window.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: November 27, 2018
    Assignee: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Publication number: 20180275484
    Abstract: An optical device includes a housing part that includes an open window disposed inside the housing part, an optical element into which light enters via the window, and a window glass plate that blocks the window. The window glass plate includes a light-transmissive base material and a metal coating film provided on an outer peripheral part of the light-transmissive base material. The window glass plate is fixed to the housing part with a solder layer provided between the metal coating film and the housing part. The housing part includes an edge part located toward the window, and the edge part includes an overhanging part that protrudes further than an inner peripheral-side edge part of the metal coating film in a direction toward a center part of the window.
    Type: Application
    Filed: May 10, 2016
    Publication date: September 27, 2018
    Applicant: Fujikura Ltd.
    Inventor: Hideyuki WADA
  • Publication number: 20180184881
    Abstract: An endoscope system includes a memory configured to be able to store a parameter set which is a combination of parameters associated with various processes during an endoscope inspection and set for each user, the memory being able to store a number of parameter sets corresponding to a plurality of user accounts, a touch panel configured to selectively display a display screen made up of a plurality of layers and a control section configured to cause the touch panel to display a user setting selection list for calling the parameter set for each user stored in the memory for part of a display region of a main screen that classifies and displays functions with high use frequency during the endoscope inspection.
    Type: Application
    Filed: February 23, 2018
    Publication date: July 5, 2018
    Applicant: OLYMPUS CORPORATION
    Inventors: Takeshi URASAKI, Aki MATSUMOTO, Nobuyasu ITO, Shinichiro SAEKI, Kenichiro MATSUSHITA, Hideyuki WADA
  • Publication number: 20180113351
    Abstract: The present disclosure describes increasing a maximum angle of incidence and a maximum angle of output, of an optical element package, with respect to an optical element contained therein, the optical element being reflective. A sealing resin (5) is filled into a gap between an LCOS element (2) and a package housing (1). The sealing resin (5) covers side surfaces (2s) and a rear surface (2b) of the LCOS element (2).
    Type: Application
    Filed: September 20, 2016
    Publication date: April 26, 2018
    Applicant: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Publication number: 20180045990
    Abstract: An optical device includes a window glass plate with which a window of a lid section is provided and which is connected to the lid section via a solder layer so that an internal space of the optical device is hermetically sealed. The solder layer has a void which is isolated from an external space and an internal space of the optical device.
    Type: Application
    Filed: March 23, 2016
    Publication date: February 15, 2018
    Applicant: FUJIKURA LTD.
    Inventors: Hideyuki Wada, Shinichi Sakamoto, Kohei Matsumaru
  • Publication number: 20180040525
    Abstract: An electronic component-mounted body (1) in accordance with an embodiment of the present invention is configured such that an IC chip (20) is fixed, with use of a post (30) having a thermosetting property, to a wiring substrate (10) having an anisotropic linear expansion coefficient.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 8, 2018
    Applicant: FUJIKURA LTD.
    Inventor: Hideyuki Wada
  • Patent number: 9667843
    Abstract: An imaging module of the invention includes: an electrical cable; a solid-state image sensing device; and a three-dimensional wiring base in which a mount surface is provided on a molded product. The mount surface has two opposed apexes which sandwich a central portion therebetween and is molded so that the distance between the two apexes is the longest in distances between two points on sides of the mount surface, a cross section parallel to the mount surface of the three-dimensional wiring base is equal to the mount surface or smaller than the mount surface, and the distance between two points that is the longest in distances on sides of a shape in a plan view of the solid-state image sensing device is equal to or shorter than the distance between the two apexes.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: May 30, 2017
    Assignee: FUJIKURA LTD.
    Inventors: Hideyuki Wada, Kenichi Nakatate
  • Publication number: 20150365571
    Abstract: An imaging module of the invention includes: an electrical cable; a solid-state image sensing device; and a three-dimensional wiring base in which a mount surface is provided on a molded product. The mount surface has two opposed apexes which sandwich a central portion therebetween and is molded so that the distance between the two apexes is the longest in distances between two points on sides of the mount surface, a cross section parallel to the mount surface of the three-dimensional wiring base is equal to the mount surface or smaller than the mount surface, and the distance between two points that is the longest in distances on sides of a shape in a plan view of the solid-state image sensing device is equal to or shorter than the distance between the two apexes.
    Type: Application
    Filed: February 13, 2014
    Publication date: December 17, 2015
    Applicant: FUJIKURA LTD.
    Inventors: Hideyuki WADA, Kenichi NAKATATE
  • Patent number: 8564101
    Abstract: A semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has another insulating layer formed in the via hole and a conductive layer formed thereon. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: October 22, 2013
    Assignees: Sony Corporation, Fujikura Ltd.
    Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta
  • Patent number: 8273657
    Abstract: A method for manufacturing a semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. Another insulating layer is formed in the via hole, and a conductive layer of the through-hole interconnection is subsequently formed. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: September 25, 2012
    Assignees: Sony Corporation, Fujikura Ltd.
    Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta
  • Publication number: 20110290545
    Abstract: A through wiring board provided with through wiring extending through the through hole of the board. The through wiring board comprises a through hole made through the board, through extension wiring provided in the through hole and extending on one side of the through wiring board up to a position at a predetermined distance from the through hole, and a conductive bump formed on the through extension wiring except the through hole position.
    Type: Application
    Filed: August 12, 2011
    Publication date: December 1, 2011
    Applicant: FUJIKURA LTD.
    Inventors: Hideyuki WADA, Tatsuo SUEMASU
  • Publication number: 20110136342
    Abstract: A semiconductor apparatus including a semiconductor substrate, an insulating layer, a via hole, and a through-hole interconnection is provided. The insulating layer is formed on the semiconductor substrate. The via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has a conductive layer formed on an insulating layer in the via hole. The surface of the insulating layer formed on the inner surface of the via hole is substantially planarized by filling a recessed portion on a boundary between the semiconductor substrate and the insulating layer formed on the semiconductor substrate.
    Type: Application
    Filed: February 15, 2011
    Publication date: June 9, 2011
    Applicants: SONY CORPORATION, FUJIKURA LTD
    Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta