Patents by Inventor Hideyuki Yamauchi

Hideyuki Yamauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11587840
    Abstract: Provided is a semiconductor device including: a substrate; an electrode layer provided on the substrate; a semiconductor chip being provided on the electrode layer, including a first side surface portion having a first angle with respect to a substrate surface of the substrate, and including a second side surface portion being provided below the first side surface portion and having a second angle smaller than the first angle with respect to the substrate surface; and a resin being provided around the electrode layer and the semiconductor chip and being in contact with the first side surface portion and the second side surface portion.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: February 21, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Hideyuki Yamauchi
  • Publication number: 20210296193
    Abstract: Provided is a semiconductor device including: a substrate; an electrode layer provided on the substrate; a semiconductor chip being provided on the electrode layer, including a first side surface portion having a first angle with respect to a substrate surface of the substrate, and including a second side surface portion being provided below the first side surface portion and having a second angle smaller than the first angle with respect to the substrate surface; and a resin being provided around the electrode layer and the semiconductor chip and being in contact with the first side surface portion and the second side surface portion.
    Type: Application
    Filed: September 4, 2020
    Publication date: September 23, 2021
    Inventor: Hideyuki Yamauchi
  • Patent number: 9333693
    Abstract: An aliphatic polyester film is obtained by melt-extruding an aliphatic polyester as a film, controlling the entrained air stream between a casting drum and the film while inhibiting the variations of the film edge portion landing points on the casting drum, and subsequently bringing the film into contact with the casting drum over the entire width of the film.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: May 10, 2016
    Assignee: Toray Industries, Inc.
    Inventors: Hideyuki Yamauchi, Junichi Masuda, Yoshikazu Endo, Osamu Kitamura
  • Publication number: 20150337097
    Abstract: A polylactic acid sheet has excellent formability, transparency, and heat resistance. The polylactic acid sheet includes a layer A mainly comprising a polylactic acid resin (the polylactic acid resin which is the main constituent of the layer A is hereinafter referred to as polylactic acid resin A), wherein the polylactic acid resin A has a melting point when measured under a condition of at least 190° C. and up to 230° C., and the polylactic acid resin A is non-oriented.
    Type: Application
    Filed: December 24, 2013
    Publication date: November 26, 2015
    Inventors: Yoichi Ishida, Hideyuki Yamauchi, Moriaki Arasaki, Jun Sakamoto
  • Publication number: 20120086155
    Abstract: An aliphatic polyester film is obtained by melt-extruding an aliphatic polyester as a film, controlling the entrained air stream between a casting drum and the film while inhibiting the variations of the film edge portion landing points on the casting drum, and subsequently bringing the film into contact with the casting drum over the entire width of the film.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 12, 2012
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Hideyuki Yamauchi, Junichi Masuda, Yoshikazu Endo, Osamu Kitamura
  • Publication number: 20030077843
    Abstract: A method of etching a multi-layer film, wherein the multi-layer film comprises at least one conductive layer and a ferroelectric layer formed sequentially on a substrate comprises forming a hard mask on at least one of the at least one conductive layers. The hard mask is used to etch the first conductive layer and the ferroelectric layer at a temperature that may exceed 100 degrees. A semiconductor device comprises first electrodes formed on a substrate, ferroelectric portions formed on the first electrodes, second electrodes formed on the ferroelectric portions, and hard masks formed on the second electrode.
    Type: Application
    Filed: July 31, 2002
    Publication date: April 24, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Hideyuki Yamauchi, Kouji Tsutsumi, Yohei Kawase
  • Publication number: 20030047532
    Abstract: A method of etching a ferroelectric layer comprises etching a ferroelectric layer using boron trichloride gas and at least one auxiliary gas selected from the group consisting of a carbon-containing gas and a nitrogen-containing gas. The carbon-containing gas may include CHF3 or C2H4. The nitrogen-containing gas may include N2 or NF3. The method reduces side etching of ferroelectric layers, and in particular, PZT-based ferroelectric layers and thereby improves electrical performance and reliability of devices made therefrom.
    Type: Application
    Filed: July 31, 2002
    Publication date: March 13, 2003
    Applicant: Applied Materials, Inc.
    Inventor: Hideyuki Yamauchi
  • Patent number: 6436838
    Abstract: In an embodiment of the present invention, a method is provided of patterning PZT layers or BST layers. For example, a PZT layer or a BST layer is plasma etched through a high-temperature-compatible mask such as a titanium nitride (TiN) mask, using a plasma feed gas comprising as a primary etchant boron trichloride (BCl3) or silicon tetrachloride (SiCi4). Although BCl3 or SiCl4 may be used alone as the etchant plasma source gas, it is typically used in combination with an essentially inert gas. Preferably the essentially inert gas is argon. Other potential essentially inert gases which may be used include xenon, krypton, and helium. In some instances O2 or N2, or Cl2, or a combination thereof may be added to the primary etchant to increase the etch rate of PZT or BST relative to adjacent materials, such as the high-temperature-compatible masking material. A TiN masking material can easily be removed without damaging underlying oxides.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: August 20, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Chen Tsan Ying, Jeng H. Hwang, Hideyuki Yamauchi, Seayoul Park, Yohei Kawase
  • Patent number: 6025286
    Abstract: A heat-sensitive stencil sheet comprises a fibrous support of polyester fibers, and a polyester film, wherein both the orientation parameter (R1) of the film and the orientation parameter (R2) of the fibers respectively obtained by laser Raman spectrometry are in a range from 3 to 10. A method for manufacturing such a heat-sensitive stencil sheet comprises thermally bonding an undrawn polyester film and a fibrous support of undrawn polyester fibers to form a laminate and then stretching the laminate, wherein, during the bonding or during the stretching, the film and the fibrous support of the laminate are heated at different temperatures, respectively.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: February 15, 2000
    Inventors: Yukio Kawatsu, Kenji Kida, Hideyuki Yamauchi
  • Patent number: 5922164
    Abstract: A method of thermally laminating a substrate with a polyester film characterized in that said film has a melting point of 150-250.degree. C., contains 0.01-1% by weight of diethylene glycol component and not more than 0.8% by weight of cyclic trimers, and has an intrinsic viscosity ?.eta.! of not less than 0.7. The film has good formability and physical properties such as impact resistance, which are hitherto not attained, and the film is excellent in adhesiveness and taste characteristics, so that the film is suited as a wrapping material and as an inner liner of containers.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: July 13, 1999
    Assignee: Toray Industries, Inc.
    Inventors: Masahiro Kimura, Hideyuki Yamauchi, Kenji Tsunashima, Shiro Imai
  • Patent number: 5888653
    Abstract: A heat-sensitive mimeograph stencil having a uniform shape of openings, which have an excellent balance of retention and permeation of printing ink is disclosed.The heat-sensitive mimeograph stencil includes a polyester film and a porous support made of polyester fibers, which is laminated on the polyester film, wherein the porous support constitutes a network having fused points formed by fusion of the fibers, and that membranes spanning the fibers are formed at some of the fused points, the membranes having thicknesses smaller than average diameter of the fibers. By virtue of this structure, the printed matter obtained by mimeographing using the stencil has high quality and is free from backside transcription. Further, the mimeograph stencil is excellent in ease of transportation.
    Type: Grant
    Filed: August 16, 1995
    Date of Patent: March 30, 1999
    Assignee: Toray Industries, Inc.
    Inventors: Yukio Kawatsu, Kenji Tsunashima, Katsuya Toyoda, Katsutoshi Ando, Hideyuki Yamauchi, Kenji Kida
  • Patent number: 5701296
    Abstract: In a burst signal detecting apparatus, a first circuit is provided to detect a falling edge in a burst signal to generate a first pulse signal when a low level of the burst signal continues for a time period after the falling edge is detected in the burst signal. Also, a second circuit is provided to detect a rising edge in a burst signal to generate a second pulse signal when a high level of the burst signal continues for the time period after the rising edge is detected in the burst signal. The first pulse signal is logically combined with the second pulse signal to generate a burst signal detection signal. Each of the time periods is smaller than a minimum time period of one bit of the burst signal. The pulse width of each of the first and second pulse signals is longer than a time period of a predetermined number of bits of the burst signal.
    Type: Grant
    Filed: February 9, 1996
    Date of Patent: December 23, 1997
    Assignee: NEC Corporation
    Inventor: Hideyuki Yamauchi
  • Patent number: 5292471
    Abstract: A polyester film, which is substantially non-oriented and whose main component is polyethylene terephthalate, is formed into a shape for example, a package, at a condition causing no yield point. The formation ability of the polyester film for forming is improved, and a formed body having a good uniformity in thickness can be obtained. Further, the range of the temperature condition causing no yield point can be enlarged by laminating a PET-system polyester, which originally tends to cause a yield point by itself, onto a polyester having no yield point. In such a laminated polyester film, the slipping property and releasing property from a mold of the film can be improved by specifying the ranges of the degree of crystallinity of each layer, the adhesive force at a high temperature of the film and the surface roughness of the film, and the shape of a formed body can be improved.
    Type: Grant
    Filed: June 9, 1993
    Date of Patent: March 8, 1994
    Assignee: Toray Industries, Inc.
    Inventors: Tatsuya Ito, Kenji Tsunashima, Hideyuki Yamauchi, Seizo Aoki, Hirokazu Kurome