Abstract: A transistor logic circuit wherein a selector is coupled to a pullup resistor and output sense amplifier through an isolation transistor. The selector includes a plurality of transistors having emitter electrodes coupled to a plurality of input terminals, base electrodes coupled to control signals and collector electrodes connected to a common output terminal. The isolation transistor has its base electrode coupled to a reference voltage and its emitter and collector electrodes serially coupled between the output terminal and the pullup resistor and output sense amplifier. Control signals fed to the base electrodes of the plurality of transistors couples a selected one of the input terminals to the output terminal. The logic state of a signal at such selected input terminal is sensed by the sense amplifier. The isolation transistor isolates the large capacitance produced as a result of connecting the collector electrodes together from the switching action of the sense amplifier.