Patents by Inventor Hieu Trung Pham

Hieu Trung Pham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SiHsoak for low hydrogen SiN deposition to improve flash memory device performance
    Patent number: 8309455
    Abstract: Prior to deposition of a silicon nitride (SiN) layer on a structure, a non-plasma enhanced operation is undertaken wherein the structure is exposed to silane (SiH4) flow, reducing the overall exposure of the structure to hydrogen radicals. This results in the silicon nitride being strongly bonded to the structure and in improved performance.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: November 13, 2012
    Assignee: Spansion LLC
    Inventors: Sung Jin Kim, Alexander Nickel, Minh-Van Ngo, Hieu Trung Pham, Masato Tsuboi, Shinich Imada
  • Low-H plasma treatment with Nanneal for electronic memory devices
    Patent number: 8202810
    Abstract: A method for forming a single damascene and/or dual damascene, contact and interconnect structure, comprising: performing front end processing, depositing copper including a copper barrier, annealing the copper in at least 90% N2 with less than 10% H2, performing planarization, performing in-situ low-H NH3 plasma treatment and low Si—H SiN etch stop layer deposition, and performing remaining back end processing.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: June 19, 2012
    Assignee: Spansion LLC
    Inventors: Alexander H. Nickel, Allen L. Evans, Minh Quoc Tran, Lu You, Minh Van Ngo, Pei-Yuan Gao, William S. Brennan, Erik Wilson, Sung Jin Kim, Hieu Trung Pham
  • SiH4 SOAK FOR LOW HYDROGEN SIN DEPOSITION TO IMPROVE FLASH MEMORY DEVICE PERFORMANCE
    Publication number: 20110266609
    Abstract: Prior to deposition of a silicon nitride (SiN) layer on a structure, a non-plasma enhanced operation is undertaken wherein the structure is exposed to silane (SiH4) flow, reducing the overall exposure of the structure to hydrogen radicals. This results in the silicon nitride being strongly bonded to the structure and in improved performance.
    Type: Application
    Filed: June 21, 2011
    Publication date: November 3, 2011
    Inventors: Sung Jin KIM, Alexander NICKEL, Minh-Van NGO, Hieu Trung PHAM, Masato TSUBOI, Sinich IMADA
  • SiHsoak for low hydrogen SiN deposition to improve flash memory device performance
    Patent number: 7985674
    Abstract: Prior to deposition of a silicon nitride (SiN) layer on a structure, a non-plasma enhanced operation is undertaken wherein the structure is exposed to silane (SiH4) flow, reducing the overall exposure of the structure to hydrogen radicals. This results in the silicon nitride being strongly bonded to the structure and in improved performance.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: July 26, 2011
    Assignee: Spansion LLC
    Inventors: Sung Jin Kim, Alexander Nickel, Minh-Van Ngo, Hieu Trung Pham, Masato Tsuboi, Shinich Imada
  • SiH4 soak for low hydrogen SiN deposition to improve flash memory device performance
    Publication number: 20100109067
    Abstract: Prior to deposition of a silicon nitride (SiN) layer on a structure, a non-plasma enhanced operation is undertaken wherein the structure is exposed to silane (SiH4) flow, reducing the overall exposure of the structure to hydrogen radicals. This results in the silicon nitride being strongly bonded to the structure and in improved performance.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 6, 2010
    Inventors: Sung Jin Kim, Alexander Nickel, Minh-Van Ngo, Hieu Trung Pham, Masato Tsuboi, Shinich Imada
  • LOW-H PLASMA TREATMENT WITH N2 ANNEAL FOR ELECTRONIC MEMORY DEVICES
    Publication number: 20090176369
    Abstract: A method for forming a single damascene and/or dual damascene, contact and interconnect structure, comprising: performing front end processing, depositing copper including a copper barrier, annealing the copper in at least 90% N2 with less than 10% H2, performing planarization, performing in-situ low-H NH3 plasma treatment and low Si—H SiN etch stop layer deposition, and performing remaining back end processing.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 9, 2009
    Inventors: Alexander H. Nickel, Allen L. Evans, Minh Quoc Tran, Lu You, Minh Van Ngo, Pei-Yuan Gao, William S. Brennan, Eric Wilson, Sung Jin Kim, Hieu Trung Pham