Abstract: It is configured to output a first I signal having passed through a first inverse characteristic circuit having inverse frequency characteristics to frequency characteristics of a first loop filter circuit, to the first loop filter circuit, and output a first Q signal having passed through a second inverse characteristic circuit having inverse frequency characteristics to frequency characteristics of a second loop filter circuit, to the second loop filter circuit.

Abstract: It is configured to output a first I signal having passed through a first inverse characteristic circuit having inverse frequency characteristics to frequency characteristics of a first loop filter circuit, to the first loop filter circuit, and output a first Q signal having passed through a second inverse characteristic circuit having inverse frequency characteristics to frequency characteristics of a second loop filter circuit, to the second loop filter circuit.

Abstract: Synthesizers (32, 24) for synthesizing feedback signals output from a plurality of antenna modules (4) are provided. A distortion compensation signal output unit (15) derives, from a difference between a feedback signal synthesized by the synthesizers (32, 24) and a base band signal output from a modulation unit (12), a distortion compensation coefficient that provides, to the base band signal, distortion characteristics opposite to distortion characteristics of a signal radiated from the phased array antenna and outputs a predistortion signal representing the distortion compensation coefficient to a PD unit (13).

Abstract: A distortion compensation circuit includes a low-pass circuit to block the passage of two-wave RF signals and intermodulation distortions and to allow the passage of a difference-frequency signal. The low-pass circuit is connected between a signal path and an intermodulation distortion adjustment circuit.

Abstract: Synthesizers (32, 24) for synthesizing feedback signals output from a plurality of antenna modules (4) are provided. A distortion compensation signal output unit (15) derives, from a difference between a feedback signal synthesized by the synthesizers (32, 24) and a base band signal output from a modulation unit (12), a distortion compensation coefficient that provides, to the base band signal, distortion characteristics opposite to distortion characteristics of a signal radiated from the phased array antenna and outputs a predistortion signal representing the distortion compensation coefficient to a PD unit (13).

Abstract: A distortion compensation circuit includes a low-pass circuit to block the passage of two-wave RF signals and intermodulation distortions and to allow the passage of a difference-frequency signal. The low-pass circuit is connected between a signal path and an intermodulation distortion adjustment circuit.

Abstract: A microwave amplifier including: a bias circuit that includes a line having an electrical length of one quarter the wavelength at the frequency configured to be amplified by the microwave amplifier and being connected between the output terminal of an amplifier and a bias voltage source, and a capacitor connected between a terminal where the line is connected to the bias voltage source and a ground that defines the reference potential of the microwave amplifier; and a resonant circuit that includes a resistor and a capacitor connected in series between the ground and the terminal where the line is connected to the bias voltage source.

Abstract: A microwave amplifier including: a bias circuit that includes a line having an electrical length of one quarter the wavelength at the frequency configured to be amplified by the microwave amplifier and being connected between the output terminal of an amplifier and a bias voltage source, and a capacitor connected between a terminal where the line is connected to the bias voltage source and a ground that defines the reference potential of the microwave amplifier; and a resonant circuit that includes a resistor and a capacitor connected in series between the ground and the terminal where the line is connected to the bias voltage source.

Abstract: Provided is a low distortion amplifier which can satisfy both securement of a setting space in a vicinity of a transistor and low impedance. The low distortion amplifier includes a short stub having a leading end thereof short-circuited with a high-frequency short-circuit element and a low-frequency short-circuit element, in which the short stub is connected to a vicinity of at least one of a gate terminal and a drain terminal of the transistor, and includes a plurality of branched lines, the plurality of branched lines each having a leading end thereof short-circuited with the high-frequency short-circuit element and the low-frequency short-circuit element.

Abstract: Provided is a low distortion amplifier which can satisfy both securement of a setting space in a vicinity of a transistor and low impedance. The low distortion amplifier includes a short stub having a leading end thereof short-circuited with a high-frequency short-circuit element and a low-frequency short-circuit element, in which the short stub is connected to a vicinity of at least one of a gate terminal and a drain terminal of the transistor, and includes a plurality of branched lines, the plurality of branched lines each having a leading end thereof short-circuited with the high-frequency short-circuit element and the low-frequency short-circuit element.

Abstract: A high-frequency amplifier is configured in such a manner that a detecting diode 4 and an NPN bipolar transistor 11 of a bias circuit 5 are biased by a common power supply, and that when the amplitude of an envelope signal increases, the bias current supplied from the NPN bipolar transistor 11 to an amplifying element 15 is suppressed following the amplitude of the envelope signal.

Abstract: A linearizer changes a gain characteristic to a valley characteristic in which a gain reduces and then increases. The linearizer includes: a signal path in which an RF signal input terminal an input side bias blocking capacitor, a diode pair, including diodes having opposite polarities to each other, an output side bias blocking capacitor and an RF signal output terminal in series in the stated order; a bias circuit in which a resistor is provided between and a signal path formed between the input side bias blocking capacitor and the diode pair and a bias terminal; an RF short-circuiting capacitor whose one end is connected with the bias circuit between the bias terminal and the resistor and whose other end is grounded; and a DC feed inductor whose one end is connected with the signal path between the diode pair and the output side bias blocking capacitor and whose other end is grounded.

Abstract: A linearizer changes a gain characteristic to a valley characteristic in which a gain reduces and then increases. The linearizer includes: a signal path in which an RF signal input terminal (1), an input side bias blocking capacitor (4), a diode pair (8, 12) including diodes having opposite polarities to each other, an output side bias blocking capacitor (5), and an RF signal output terminal (2) in series in the stated order; a bias circuit in which a resistor is provided between and a signal path formed between the input side bias blocking capacitor (4) and the diode pair (8, 12) and a bias terminal (3); an RF short-circuiting capacitor (6) whose one end is connected with the bias circuit between the bias terminal (3) and the resistor (7) and whose other end is grounded; and a DC feed inductor (11) whose one end is connected with the signal path between the diode pair (8, 12) and the output side bias blocking capacitor (5) and whose other end is grounded.