Abstract: According to one embodiment, a semiconductor memory device includes a stacked body in which a plurality of conductive layers containing molybdenum (Mo) are stacked to be spaced apart from each other in a first direction, a pillar structure including a semiconductor layer extending in the first direction in the stacked body, a partition structure extending in the first direction and in a second direction intersecting the first direction in the stacked body, and dividing the stacked body in a third direction intersecting the first and second directions, and a plurality of intermediate layers, each including a portion provided between the pillar structure and a corresponding one of the conductive layers, and containing a compound of molybdenum (Mo) and boron (B).

Abstract: According to one or more embodiments, a non-volatile semiconductor memory device includes a semiconductor region, a gate electrode, a charge storage layer, a first insulating layer, a second insulating layers, and a conductive layer. The conductive layer contains titanium (Ti), aluminum (Al) and nitrogen (N) and has a structure in which a plurality of first layers and a plurality of second layers are alternately provided in a thickness direction. Each first layer contains titanium and nitrogen. Each second layer contains aluminum and nitrogen. In the conductive layer, the ratio of aluminum atomic composition to the sum of the titanium atomic composition and the aluminum atomic composition is equal to or less than 50%.

Abstract: A semiconductor device includes a semiconductor layer including first and second regions and a third region therebetween, a gate insulating layer between the third region and a gate electrode, first and second electrodes connected to the first and second regions in a first direction, a first conductive layer between the first region and the first electrode and/or between the second region and the second electrode. The first conductive layer includes a metal element, aluminum, and nitrogen, and has first and second portions. An atomic concentration of the metal element is higher than that of aluminum in the first portion. An atomic concentration of aluminum is higher than that of the metal element in the second portion. The device further includes a second conductive layer between the oxide semiconductor layer and the first conductive layer. The second conductive layer includes oxygen and at least one of indium, zinc, tin, and cadmium.

Abstract: According to one or more embodiments, a non-volatile semiconductor memory device includes a semiconductor region, a gate electrode, a charge storage layer, a first insulating layer, a second insulating layers, and a conductive layer. The conductive layer contains titanium (Ti), aluminum (Al) and nitrogen (N) and has a structure in which a plurality of first layers and a plurality of second layers are alternately provided in a thickness direction. Each first layer contains titanium and nitrogen. Each second layer contains aluminum and nitrogen. In the conductive layer, the ratio of aluminum atomic composition to the sum of the titanium atomic composition and the aluminum atomic composition is equal to or less than 50%.

Abstract: According to one embodiment, a semiconductor device includes a substrate; a stacked body provided on the substrate, the stacked body including a plurality of electrode layers stacked with an insulator interposed; a semiconductor body provided in the stacked body; and an insulating film. The semiconductor body includes a channel portion extending in a stacking direction of the stacked body, and a lower end portion of the semiconductor body provided between the channel portion and the substrate. The insulating film includes a charge storage film provided between the stacked body and the semiconductor body. A lower end portion of the insulating film surrounds the lower end portion of the semiconductor body. An upper surface of the lower end portion of the insulating film is provided at a lower height than an upper surface of the lower end portion of the semiconductor body in the stacking direction.

Abstract: According to one embodiment, the first lines extend in a first direction. The first gate electrodes extend in a second direction intersecting with the first direction. The second lines extend in a third direction orthogonal to the first direction and the second direction. The semiconductor portion is disposed between the first gate electrodes, and between one of the first lines and one of the second lines, and connected to the first line and the second line. The semiconductor portion has a column shape. The semiconductor portion includes a plurality of channels isolated in a direction orthogonal to the third direction. The second gate electrode is provided between the channels. The insulating film is provided between the semiconductor portion and the first gate electrode, and between the semiconductor portion and the second gate electrode.

Abstract: According to one embodiment, a semiconductor device includes a substrate; a stacked body provided on the substrate, the stacked body including a plurality of electrode layers stacked with an insulator interposed; a semiconductor body provided in the stacked body; and an insulating film. The semiconductor body includes a channel portion extending in a stacking direction of the stacked body, and a lower end portion of the semiconductor body provided between the channel portion and the substrate. The insulating film includes a charge storage film provided between the stacked body and the semiconductor body. A lower end portion of the insulating film surrounds the lower end portion of the semiconductor body. An upper surface of the lower end portion of the insulating film is provided at a lower height than an upper surface of the lower end portion of the semiconductor body in the stacking direction.

Abstract: According to one embodiment, a semiconductor device includes a substrate; a stacked body provided on the substrate, the stacked body including a plurality of electrode layers stacked with an insulator interposed; a semiconductor body provided in the stacked body; and an insulating film. The semiconductor body includes a channel portion extending in a stacking direction of the stacked body, and a lower end portion of the semiconductor body provided between the channel portion and the substrate. The insulating film includes a charge storage film provided between the stacked body and the semiconductor body. A lower end portion of the insulating film surrounds the lower end portion of the semiconductor body. An upper surface of the lower end portion of the insulating film is provided at a lower height than an upper surface of the lower end portion of the semiconductor body in the stacking direction.

Abstract: A semiconductor memory device according to an embodiment includes: a plurality of first conductive lines stacked in a first direction above a semiconductor substrate and extending in a second direction; a second conductive line extending in the first direction; semiconductor layers arranged between the first conductive lines and the second conductive line and extending in the first direction; a conductive layer in contact with a bottom surface of the semiconductor layer with a first impurity of a first conductivity type; and variable resistance films arranged at intersections between the first conductive lines and the semiconductor layer, the semiconductor layer having a first semiconductor part arranged from the bottom surface of the semiconductor layer to a position equal to or lower than a bottom surface of the first conductive line at a lowermost layer in the first direction with a second impurity of a second conductivity type.

Abstract: According to one embodiment, a semiconductor device includes a substrate; a stacked body provided on the substrate, the stacked body including a plurality of electrode layers stacked with an insulator interposed; a semiconductor body provided in the stacked body; and an insulating film. The semiconductor body includes a channel portion extending in a stacking direction of the stacked body, and a lower end portion of the semiconductor body provided between the channel portion and the substrate. The insulating film includes a charge storage film provided between the stacked body and the semiconductor body. A lower end portion of the insulating film surrounds the lower end portion of the semiconductor body. An upper surface of the lower end portion of the insulating film is provided at a lower height than an upper surface of the lower end portion of the semiconductor body in the stacking direction.

Abstract: According to an embodiment, a semiconductor memory device comprises: a first semiconductor layer extending in a first direction; a first wiring line extending in a second direction intersecting the first direction; a variable resistance layer provided between these first wiring line and first semiconductor layer; and a first gate electrode extending in the first direction and facing the first semiconductor layer via a first insulating layer. In addition, this semiconductor memory device comprises a second gate electrode provided in the first direction with respect to the first wiring line, extending in the second direction in parallel to the first wiring line, and facing the first semiconductor layer. This second gate electrode faces the first semiconductor layer via a second insulating layer. Moreover, this second gate electrode faces the first gate electrode via the second insulating layer, the first semiconductor layer, and the first insulating layer.

Abstract: According to an embodiment, a semiconductor memory device comprises: a first semiconductor layer extending in a first direction; a first wiring line extending in a second direction intersecting the first direction; a variable resistance layer provided between these first wiring line and first semiconductor layer; and a first gate electrode extending in the first direction and facing the first semiconductor layer via a first insulating layer. In addition, this semiconductor memory device comprises a second gate electrode provided in the first direction with respect to the first wiring line, extending in the second direction in parallel to the first wiring line, and facing the first semiconductor layer. This second gate electrode faces the first semiconductor layer via a second insulating layer. Moreover, this second gate electrode faces the first gate electrode via the second insulating layer, the first semiconductor layer, and the first insulating layer.

Abstract: A semiconductor memory device according to an embodiment includes: a plurality of first conductive lines stacked in a first direction above a semiconductor substrate and extending in a second direction; a second conductive line extending in the first direction; semiconductor layers arranged between the first conductive lines and the second conductive line and extending in the first direction; a conductive layer in contact with a bottom surface of the semiconductor layer with a first impurity of a first conductivity type; and variable resistance films arranged at intersections between the first conductive lines and the semiconductor layer, the semiconductor layer having a first semiconductor part arranged from the bottom surface of the semiconductor layer to a position equal to or lower than a bottom surface of the first conductive line at a lowermost layer in the first direction with a second impurity of a second conductivity type.

Abstract: A nonvolatile semiconductor memory device includes a memory cell array. The memory cell array includes conducting layers, semiconductor layers, variable resistance films, and first wirings. The conducting layers are laminated in a first direction perpendicular to a substrate, and extend in a second direction parallel to the substrate. The semiconductor layers extend in the first direction. The variable resistance films are disposed at intersection points of the conducting layers and the semiconductor layers. Each first wiring is opposed to the semiconductor layer via a gate insulating film. The first wirings extend in the first direction. Each variable resistance film has a first thickness at a first part. The first thickness is in a direction from the conducting layers to the semiconductor layer. The variable resistance film has a second thickness at a second part. The second part is far from the substrate more than the first part. The second thickness is smaller than the first thickness.

Abstract: According to one embodiment, a semiconductor device includes a stacked body, a semiconductor body of a first conductivity type, a memory film, and a first semiconductor layer of the first conductivity type. The stacked body includes a plurality of electrode layers stacked with an insulator interposed. The semiconductor body includes a first portion, a second portion, and a third portion. The second portion is provided between the first portion and the third portion. The memory film is provided between the semiconductor body and at least a part of the electrode layers. A concentration of a first conductivity type carrier of the first semiconductor layer is higher than a concentration of the first conductivity type carrier of the third portion. The second portion includes a channel of a selection transistor. The third portion includes a channel of a memory cell.

Abstract: According to an embodiment, a semiconductor device includes two electrodes extending in a first direction, a semiconductor layer provided between the two electrodes, an insulating film disposed between the two electrodes. The two electrodes are arranged in a second direction intersecting the first direction. The semiconductor layer extends in a third direction orthogonal to the first direction and the second direction. The insulating film covers a side surface of the semiconductor layer opposite to one of the two electrodes. The semiconductor layer has a shape in a cross section perpendicular to the third direction such that a width in the first direction at a center of the cross section is narrower than a width, in the first direction, of the side surface.

Abstract: According to an embodiment, a non-volatile memory device includes first electrodes arranged in a first direction, a second electrode disposed on a side of the first electrodes in the first direction, a semiconductor layer extending in the first direction through the first electrodes and the second electrode, and a memory film provided between the semiconductor layer and each of the first electrodes. The semiconductor layer includes crystal grains and has a first portion and a second portion, the first portion being adjacent to the first electrodes, and the second portion being adjacent to at least a part of the second electrode, wherein the first portion includes a larger crystal grain than a crystal grain in the second portion.

Abstract: A non-volatile memory device includes a first electrode layer, a second electrode layer adjacent to the first electrode layer, a third electrode layer adjacent to the second electrode layer, a fourth electrode layer adjacent to the third electrode layer, and a channel body extending through the first electrode layer, the second electrode layer, the third electrode layer and the fourth electrode layer in a first direction. The device further includes a circuit electrically connected to the first electrode layer, the second electrode layer, the third electrode layer, the fourth electrode layer, and the channel body. The circuit providing the second electrode layer with a first potential, the third electrode layer with a second potential higher than the first potential, the fourth electrode layer with a third potential between the first potential and the second potential and the channel body with a potential rising in the first direction.

Abstract: A non-volatile memory device includes a first electrode layer, a second electrode layer adjacent to the first electrode layer, a third electrode layer adjacent to the second electrode layer, a fourth electrode layer adjacent to the third electrode layer, and a channel body extending through the first electrode layer, the second electrode layer, the third electrode layer and the fourth electrode layer in a first direction. The device further includes a circuit electrically connected to the first electrode layer, the second electrode layer, the third electrode layer, the fourth electrode layer, and the channel body. The circuit providing the second electrode layer with a first potential, the third electrode layer with a second potential higher than the first potential, the fourth electrode layer with a third potential between the first potential and the second potential and the channel body with a potential rising in the first direction.

Abstract: According to an embodiment, a semiconductor device includes at least two control electrodes, a plurality of semiconductor layers and an insulating film. Each control electrode extends in a first direction. The semiconductor layers are provided between the control electrodes, and arranged in the first direction. Each semiconductor layer extends in a second direction orthogonal to the first direction. The insulating film covers side surfaces of the semiconductor layers, and is disposed between the control electrodes. Each semiconductor layer has a side surface that includes at least one curved surface swelling in a direction from a center of the semiconductor layer to the insulating film.